As the semiconductor industry pushes toward smaller features and more complex transistors for more powerful and faster chips, mask technology manufacturers face strict requirements for critical dimension (CD) uniformity and mask overlay. An error of a few nanometers in mask fabrication can result in transistors with different performance. A critical role is played by the image placement (IP) errors generated during the fabrication step by many factors that are sometimes difficult to control.1–3
We are particularly interested in finding solutions to reduce errors related to work piece charging during electron-beam (e-beam) exposure. When writing high-density areas, the charge applied to the insulating resist surface generates a potential on the sample. The incoming charge is deflected from the original trajectory, causing IP errors up to several nanometers and resulting in poor CD uniformity. To date, approaches to solving these problems include modifications of the mask design to correct for deflection defects,4 registration control technology corrections,5 or the use of a conductive top coat. We are using a conductive discharge layer (CDL) on top of the insulating e-beam resist because the current commercially available materials are not suitable for mask applications, and using a top coat appears to result in significant improvement at the mask level. We apply the film on the top after the post-applied bake of the resist. We remove it with dionized water post–e-beam exposure following two possible pathways, pre–post-exposure bake (PEB)—see Figure 1(a)—or post-PEB: see Figure 1(b).
Figure 1. Processing flow for the removal of the conductive discharge layer (CDL): (a) before post-exposure bake (PEB) and (b) after PEB. TMAH: Tetramethylammonium hydroxide.
For mask manufacturing to be practical, such a layer needs to satisfy critical requirements for conductivity, coating quality, and resist compatibility. At the end it must reduce IP errors. To minimize the charging effect, we estimated that the polymer's conductivity should be 1.0×10−4 to 1.0×10−1S/cm. Also, the conductive polymer dispersion should give defect-free coatings and be stable at room temperature for several months. We confirmed the conductivity of the tested CDL films using a four-point probe system as well as measurements in time-domain conditions.6
We developed water-based CDL materials, as water will generally not interact with an organic resist. Water-dispersible polyanilines and polythiophenes for CDL applications have been reported.7 Our approach was to look for a water-dispersible polyaniline (PANI) material with a good balance between conductivity and dispersibility as well as good storage stability.
PANIs are some of the most important electrically conductive organic polymers. Their earlier formulations doped with inorganic acids were intractable solids that could not be dispersed in solvents or melted for processing. Subsequently, PANIs doped with small-molecule organic acids, such as camphor sulfonic acid, were found to be dispersible in a limited number of organic solvents such as N-methyl pyrrolidine. Later, they were made from aniline monomers by complexing them to polymeric acids such as poly(4-styrenesulfonic acid) and subsequently polymerizing them.8 In this method, described as template-guided polymerization, the polymeric acid acts as a template for the polymerization and also as a dopant to the resulting PANI (see Figure 2), which is now water-based. We tested polymers and co-polymers of many aniline derivatives (different R groups) using 4-styrenesulfonic acid as the template and ammonium persulfate as the oxidant.
Figure 2. Doped polyaniline made by template-guided polymerization. R: Substituent. n, m: Number of repeat units in each polymer strand.
Previously, we reported minimal interaction between the CDL and the resist.6 Here we measured the CD registration with and without CDL (see Figure 3). Comparing the x and y variations for the two masks, we found that CDL reduces IP errors by 50% (i.e., the x error goes from 9.7 to 4.8nm, and the y error from 11.4 to 5.3nm).
Figure 3. Image placement errors. Comparison without (left) and with (right) CDL. CDL provides a 50% improvement in both x and y registration. SD: Standard deviation.
In summary, we presented important considerations on IP errors and how to correct them using our optimized CDL based on polyaniline. Our initial results are definitely encouraging, and we plan to optimize the CDL film quality to reduce the number of defects.
We acknowledge T. Nagasawa, S. Watanabe, Y. Kawai (ShinEtsu Chemical), S. Kondo, J. Kotani, M. Kagawa, T. Senna (Toppan), L. Sundberg, M. Sanchez, E. Lofano, C. Rettner (IBM Almaden), and T. Faure (IBM Mask House).
Luisa Bozano, Ratnam Sooriyakumaran
IBM Almaden Research Center
San Jose, CA
Luisa Bozano is a research staff member in the nanofabrication group working on e-beam resist development and testing.
Ratnam Sooriyakumaran, senior technical staff member, focuses on advanced patterning materials for next-generation lithography.
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