Extreme ultraviolet lithography (EUVL) has been identified as the most promising technique for generating semiconductor wafers with a 22nm half-pitch or less, according to surveys taken at SEMATECH's Lithography Forum last year as well as at the 2008 International EUVL Symposium.1,2 The same groups ranked mask defectivity as the second highest challenge – after source power – that needs to be overcome in order to ensure the success of this technology.
EUV light (with a wavelength, λ, of ~13.5nm) is absorbed by all known materials; therefore, one cannot simply make a transmissive mask as is commonly used in optical lithography employing longer wavelengths. It is, however, possible to build Bragg mirrors for EUV light by using Molybdenum/Silicon (MoSi) bilayers of 3nm and 4nm thickness, respectively. The process then becomes one of reflectance rather than transmittance.
MoSi multilayers are now commonly used in EUV optic systems. The mask blanks are made of 6-inch square, low thermal expansion material glass substrates coated with MoSi multilayers and surmounted with a capping layer. Typically, 40 to 50 bilayers are required to achieve a reflectivity of 62-70% at λ∼ 13.5nm. They are then coated with a 70nm tantalum nitride-based layer that will be patterned to form the absorbing masks.
EUV patterned mask defects are, to a degree, similar to those on patterned optical masks, and they can be dealt with in the same way. However, reducing blank defects or rendering them non-printable remains a challenge.
Blank defects are a combination of defects on the substrate and those generated during the multilayer deposition process. Over the past three years, progress has been made to reduce the total numbers of defects by a factor of 3, primarily through removing smaller particles (see Figure 1). However, the ratio of defects shows no substantial change. The majority of the total arise from particles on the substrates, which makes substrate cleaning a vital step in reducing EUV mask defectivity.
Figure 1. Defect Pareto diagram of champion EUV mask blanks at SEMATECH in 2005 (left) and 2008 (right). Total defects are 18 defects ≥73nm in 2005 and 8 defects ≥53nm in 2008.
Substrate defects are divided into soft and hard particles. Soft particles are those on the top of the substrate that are attached to the surface by Van der Waals forces; hard particles, on the other hand, are partially embedded in the surface or are shallow particles with a large contact area. We have demonstrated that such hard defects can be removed by multiple cleaning steps. However, even after removal, traces remain as pit defects in the substrate (see Figure 2) that were created during chemical mechanical polishing (CMP) steps. Therefore, when using this method, improving the polishing process is the most critical step in reducing substrate pits.3
Figure 2. Atomic force microscope image of a hard particle defect 4nm high with a large contact area before cleaning (left) and the remaining pit after cleaning (right) on an EUV substrate surface.
There are techniques to reduce pits, such as pit smoothing by multilayer deposition/etch, which was originally developed at Lawrence Livermore National Lab.4 This process has been transferred to SEMATECH. However, despite the high smoothing capability, this technique currently leads to a higher total number of defects due to difficulty in controlling the chamber cleanliness. Therefore, although substrate pits can be smoothed, the multilayer deposition/etch process itself is not yet clean enough to be used in EUV blank manufacturing.
Recently, SEMATECH researchers developed a pit smoothing processes based on anisotropic etching of the surface layer on the glass, which results in shallower and wider pits while also reducing the total number of defects on the substrate.5 After smoothing, the average pit depth is shallower and the depth distribution is reduced (see Figure 3). Tests show that the number of defects ≥50nm have been reduced from 134 to 4 (see Figure 4).
Figure 3. Histogram of depths of pits on an EUV substrate before the smooth/clean process (Pre) and after the smooth/clean process (Post).
Figure 4. Defect map of a typical EUV substrate before (left) and after (right) the smooth/clean process.
Still, efforts to reduce defects are hampered by the limits of current mask blank inspection systems. In response to this critical requirement, SEMATECH and Lasertec engaged in a joint development program to develop the M7360 blank inspection system to detect particles ≥30nm. The Lasertec M7360 has provided valuable information for both SEMATECH and the industry. However, with the prospect of EUVL extending to the 16nm half-pitch node, the need for a new blank inspection tool capable of detecting defects as small as 20nm is evident.
Another important consideration is the effect of mask cleaning on mask life time. EUV masks need to be durable under multiple cleaning processes.6 The capping layer on top of the MoSi multilayers of the blank is the most critical layer in this case. It has two functions. The first is to protect the MoSi multilayer, and the second is to serve as an etch stop layer for absorber patterning. Two common capping materials are ruthenium (Ru) and silicon (Si). Si does not have good selectivity to chemistries used in dry etching the absorber. As a result, an additional buffer layer is usually used between the absorber and capping layer. A 2.5nm thick Ru layer can provide both capping and etch stop properties. However, Ru can be oxidized by UV radiation and/or exposure to some common chemicals used for mask cleaning.
Our efforts have shown that cleaning the EUV mask substrate is the most challenging particle removal problem in current semiconductor technology. The substrate defects that remain are the greatest contributors to the total number of EUV mask blank defects, and there remains a need to improve CMP and final glass polishing steps to reduce pit defects. We are continuing to look at new ideas for pit smoothing by cleaning, and are studying different chemistries for Ru cleaning to obtain a cleaning process that does not change the surface properties of the cap.
Abbas Rastegar is a senior member of the technical staff at SEMATECH, in charge of advanced mask cleaning. He is a surface physicist with a background in nano-science and engineering. He has more than 100 publications in different journals and conference proceedings. For the past few years, he has been reporting the progress of his team at SEMATECH in EUV mask blank cleaning in SPIE Lithography and at Mask conferences.
6. S. Huh, H. Kim, G. Yoon, J. Choi, H. Lee, D. Lee, B. Ahn, H. Seo, D. Kim, S. Kim, H. Cho, T. Watanabe, H. Kinoshita, Lifetime of EUVL masks as a function of degree of carbon contamination and capping materials, Proc. SPIE 6921, pp. 692115, 2008. doi:10.1117/12.772412