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Micro/Nano Lithography

Cheap nanoimprint lithography

A cost-effective device allows nanoimprint lithography with a photolithography mask aligner.
21 March 2008, SPIE Newsroom. DOI: 10.1117/2.1200803.1029

Nanoimprint lithography1 is a patterning technology based on mechanical deformation of resist at the nanometer scale. It is a key enabler of low-cost, high-throughput fabrication for nanotechnology. For example, we have used nanoimprinting to make crossbar structures with a half-pitch as small as 17nm,2 isolated nanowires 6nm wide, and other functional nanoelectronic and nanophotonic devices.

Although its resolution significantly exceeds that of photolithography, nanoimprint lithography is still in the development phase. The technology faces unique challenges, such as applying uniform force during the mechanical contact of pattern transfer and preserving the alignment and sequential overlay during imprinting. The traditional approach to maintaining tight overlay between consecutive print layers is to improve the mechanical stability of the system. The inevitable added expense, however, could threaten the cost advantage of nanoimprint lithography.

We have developed a novel approach for imprinting that both preserves alignment during template-wafer approach and applies a uniform force. The resulting module, shown in Figure 1, is compact enough to be incorporated into a mask aligner, transforming it into a machine that can do both alignment and nanoimprinting.

Figure 1. A compact module transforms a contact-mask aligner into a nanoimprinting machine.

Instead of applying the imprint pressure mechanically, we use gas pressure on the back side of the wafer (or the mold). Spacers with accurate heights are deposited onto the template, enabling the template to slide across the wafer during alignment. When the two layers are aligned, gas pressure is applied to distort the wafer (or the mold) very slightly, just enough to press the mold into the resist on the wafer and carry out the printing.

This approach has several advantages. First, there is no machine movement after alignment until the imprint is completed, so alignment is not lost during the process. Second, the mechanical path between the nanoimprint mask and substrate is minimized for better mechanical stability. Third, using gas ensures that the imprint pressure is uniform. Fourth, during the imprint process, contact occurs first at the center of the imprint area and then spreads out to the edges, which prevents air from being trapped between the mask and substrate. Finally, the mold and wafer are separated simply by releasing the gas pressure.

Although our approach is fully extensible to multi-die step-and-repeat printing for volume production, our first prototype is a low-cost module (<$100K) that can be incorporated into a conventional mask aligner. It takes advantage of the inherent ability of a mask aligner to achieve better than 0.5μm of overlay accuracy, as demonstrated in Figure 2. The overlay accuracy is only limited by the resolution of the optical microscope on the aligner.

Figure 2. (A) Optical image of the alignment marks from two nanoimprint lithograph (NIL) steps shows that the alignment is accurate to within a half micron. (B) Scanning-electron-microscope image of two square patterns, fabricated by two nanoimprint and processing steps, shows a misalignment of about a quarter micron.

This nanoimprint module is primarily intended for a research-and-development environment or for low-volume production. It uses a UV-curable process with a double layer of spin-coated resists.3 The mold is based on a standard 5in mask-blank platform and the field size is 1in(×)1 in. Gas pressure is applied to the back of the wafer to make the imprint pressure uniform, and a vacuum applied between the mask and the substrate eliminates air trapping.

This module has been commercialized by NanoLithoSolution Inc.4 through a non-exclusive licensing agreement with Hewlett-Packard Company. We are working on improving the overlay accuracy to <20nm by incorporating a nano-mover into the wafer stage and using various alignment technologies.

This work was supported in part by DARPA.

Wei Wu
Palo Alto, CA
William Tong
Corvallis, OR
IQRL, HP lab
Palo Alto
Jonathan Bartman, Yufeng Chen
Corvallis, OR
Robert Walmsley, Zhaoning Yu, Inkyu Park, Shih-Yuan Wang, R. Stanley Williams
Palo Alto, CA