Research into silicon photonics has many motivations for employing mature CMOS processing technology to fabricate low-cost photonic and electronic integrated devices. High-volume manufacturing for data communication applications is just one example. Recently, we showed the utility of a hybrid silicon evanescent device in building lasers, amplifiers, and photodetectors. This structure combines a silicon waveguide and III-V semiconductor quantum wells to promote efficient light amplification and absorption through the III-V layers. The technique avoids the need for sophisticated alignment between the different substrates. Moreover, it enables production of multiple photonic active devices through a single bonding step, thus distinguishing itself from the individual III-V die attachment method with flip-chip bonding. Lasers,1 amplifiers,2 detectors,3 and racetrack lasers4 are some of the standalone devices that have been built using this approach.
Here, we combine photoreceivers with an amplifier and photodetector5 to illustrate the potential of photonic integration. Light detection is a major area of endeavor in silicon photonics. Germanium and silicon germanium, for instance, are good detector materials because of their absorption at the 1.3- and 1.5μm telecommunication wavelengths and their CMOS processing compatibility. Among the advances6,7 made possible by these materials is a photoreceiver integrated with CMOS electronics.8 Silicon evanescent photodetectors are also interesting since their absorption edge can easily be extended beyond the 1600nm regime by engineering III−V quantum wells. In addition, they can be combined with lasers and amplifiers using the same materials and fabrication procedures.
Figure 1(a) shows an array of integrated amplifiers and detectors. For a 1.2mm−long structure, the maximum gain is 9.5dB at 300mA. The quantum efficiency of the 100μm detector is 50%. By putting the two together, the responsivity of the receiver increases to 5.7A/W with preamplification. The device shows 0.5dB saturation at a photocurrent of 25mA (see Figure 2). To reduce reflection in the amplifier, the ends of the III-V mesa are tapered to adiabatically (without mode mismatch loss) convert the hybrid mode to the silicon mode: see Figure 1(b). The reflectivity of these tapered junctions is estimated from the amplified spontaneous emission noise of the amplifier and is calculated to be <6× 10−4 with a coupling loss between 0.6 and 1.2dB for different devices across the die. The device bandwidth is measured as 3GHz by time domain impulse response, even though the resistance-capacitance–limited bandwidth is estimated to be 7.5GHz, indicating that the device speed is primarily constrained by the current III-V layer design. The quantum wells have a valence band offset of ∼105meV between the well and the barrier, which causes hole trapping and electrical field screening. A higher bandwidth can be achieved by using wells with a smaller valence band offset and a thinner separated confinement heterostructure layer to reduce the hole transit time.
Figure 1. (a) Top view of eight integrated devices with amplifiers (left) and detectors (right). (b) The III−V taper of the amplifier.
Figure 2. Saturation characteristics of the preamplified photodetector.
The hybrid silicon evanescent device platform provides a means of building active photonic devices on silicon by combining its mature, low-cost manufacturability with the optical functionality of III-V materials. The photoreceiver we have described shows an 8.5dB improvement in receiver sensitivity enabled by the integration of a hybrid silicon evanescent preamplifier and a waveguide photodetector. Potential benefits of this research include wavelength division multiplexing receivers with silicon passive wavelength demultiplexers and improved detector bandwidth.
Hyundai Park, John Bowers
University of California, Santa Barbara
Santa Barbara, CA