Adrian Tang: Using CMOS technology for next-generation extreme weather forecasting
An interview from SPIE Defense + Commercial Sensing 2017.
Adrian Tang has over 16 years of CMOS/SiGe IC design experience in both research and commercial wireless environments with projects ranging from commercial Bluetooth and WLAN chipsets to mm-wave and THz chipsets for communication, radar, and spectrometer systems.
He is currently a researcher with NASA's Jet Propulsion Laboratory in Pasadena, CA, as well as the University of California, Los Angeles. At JPL, he directs the space-system-on-chip (SoC) laboratory and is currently leading development of a wide range of CMOS SoC chipsets for spectrometer, radiometer, and radar instruments targeting Earth science, planetary, and astrophysics investigations at microwave to sub-mm-wavelengths. At UCLA his research focuses on low power.
Tang received his PhD in electrical engineering from the University of California, Los Angeles in 2012. During his graduate studies, he developed CMOS mm-wave and THz circuits and systems for imaging, radar, and communication systems. He was the first to demonstrate reflective imaging in CMOS technology and the first to demonstrate sub-centimeter scale accuracy radar in silicon technology. During his postdoctoral studies he worked on developing 670 GHz compact radar systems for concealed weapons and explosives detection at stand-off.
Tang's work was recognized with a 2017 Rising Researcher Award from SPIE for his work with CMOS SoC chipsets. This program honors early career professionals who are conducting outstanding work in product development or research in the defense, commercial, and scientific sensing, imaging, optics, or related fields.