This PDF file contains the front matter associated with SPIE Proceedings Volume 10810, including the Title Page, Copyright information, Table of Contents, Author and Conference Committee lists.

Captive and merchant mask makers participated in an anonymous survey in the summer of 2018 to capture the profile of the mask industry for the period of July 2017 through June 2018. The eBeam Initiative’s fourth Mask Makers’ Survey in 2018 covers a number of questions related to the profile of the mask industry, from overall number of masks to pattern generation type. The survey respondents – the same 10 captive and merchant photomask manufacturers who participated in last year’s survey – reported a 27% overall increase in mask output this year as compared to last. Increases were reported in numbers of masks produced at every ground rule, but ≥5nm and <7nm, ≥16nm and <22nm, and ≥65nm and <90nm were particularly pronounced in percentage increases year over year. Respondents reported that lasers wrote 74% of the masks they produced this past year. Overall mask yields have remained steady at 94% over the last two years. The eBeam Initiative also conducts an annual Perceptions Survey of mask industry luminaries which can be found at www.ebeam.org.

Machine learning (ML) has become increasingly powerful and several recent works have demonstrated the capa- bility of neural networks to achieve performance gains for lithography applications. Much of the general literature on neural networks involves image classification. Application of neural networks to lithography requires increased scrutiny. How far can such a system be trusted, and how should we respond if the system fails? Neural net- works can appear inscrutable and we lack understanding of why these systems generalize so well. On the other hand, the benefits neural networks appear to offer, in terms of reduced runtime or more accurate models, are compelling. This work will illustrate how two techniques, the Information Bottleneck (IB) and t-Distributed Stochastic Nearest Neighbors (t-SNE), that can improve our understanding of how neural networks work. We will use a multilayer perceptron for a simple resist model implemented with neural networks. We will then discuss how visualiztion methods can help assess the readiness of a neural network for a task, or help diagnose potential causes of failure.

In Mask Data Preparation (MDP), fracture time can vary from a few seconds to hours or even days. Distributed computing is used to achieve reasonable times for large jobs. To allow more efficient scheduling of the available hardware infrastructure, we need a method to estimate fracture time. Such time estimation is difficult, not only because fracturing in MDP is becoming more complex as technology progresses, but also because fracture time has a direct correlation to the input data, which is a priori unknown. A fracture flow might include data transformations such as scaling, orientation, sizing, and arbitrarily complex Boolean operations among multiple inputs. This complexity provides an opportunity to explore a Machine Learning approach to derive a fracture time prediction model. In this paper we propose a novel machine learning-based method to automatically predict fracture time at the beginning of the process. The approach combines information from the input data and the fracture flow using supervised learning techniques. In particular, to train our machine learning model, we employ a scan of the data, a flow representation and a collection of measured times from real fractures. The work is divided into two parts: a simple fracture of only one input without further processing, and a more general case with several inputs and processes over them. In both cases, our experiments showed that our predictor can achieve low mean squared error estimates and a coefficient of determination (R²) over 0.70. The best results were obtained with a 2-layers artificial neural network (ANN) in a standard multi-layer perceptron (MLP) configuration.

Machine learning is a powerful tool to learn a predictive model which can give a statistical or probabilistic solution to a problem. It has widely been applied to major issues in design for manufacturing field, such as SRAF generation, compact resist model and lithography hotspot detection. Although it is sometimes considered as an effective technique that solves serious problems, a reliable solution is rarely achieved without detailed understanding of the problem and appropriate problem formulation. In this paper, we will discuss basic concept and recent results of machine learning applications in design for manufacturing.

EUV (Extreme Ultraviolet) lithography is one of the most promising techniques for imaging 5-nm node and beyond wafer features. Mask defects that matter are the ones that print during exposure at 13.5 nm wavelength. To support EUV development and production schedules, mask defectivity must be reduced to be at or near the optical defect levels. This task is complicated by the fact that actinic EUV mask inspectors are not currently available. In the absence of an actinic EUV inspection tool, all available methods for detecting and characterizing defects must be deployed. Based on extensive deployment and experience in the industry with optical masks, and on its record for reasonable throughput, 19x nm wavelength inspection is one of the strongest candidates available today, for the initial EUV mask inspection approach. However, there are several key challenges with 19x nm optical inspection of EUV masks. One such challenge is defect sensitivity. Another challenge is that EUV mask pattern image contrast changes as a function of pattern size and pitch. This is often referred to as “Tone Reversal”, and it is a phenomenon that occurs for specific features. It is essential to understand the impact of tone reversal on defect sensitivity and overall inspectability, specifically for image sizes and pitches at the point of tone reversal, and for those immediately on either side of the tone reversal. In this study, the relationship between base pattern contrast and absorber defect sensitivity will be discussed through the analysis of programmed defect macros (PDMs). We will also discuss whether we can influence the point at which tone reversal occurs and furthermore, whether that reversal point can be tailored to specific patterns sizes or pitches. We will demonstrate how inspection parameter optimization can be done to tailor 19x inspection to specific layer and specific groundrules to maximize both sensitivity and inspectability.

EUV (Extreme Ultraviolet) lithography is one of the key enabling techniques for imaging 7-nm node and beyond wafer technologies. To ensure mask quality levels will support High Volume Manufacturing (HVM), all “defects that matter”, must be identified and screened out before shipment to the wafer fab. Mask defects that matter are the ones that print during exposure at 13.5 nm wavelength. To support EUV development and production schedules, mask defectivity must be reduced to be at or near the optical defect levels. This task is complicated by the fact that actinic EUV mask inspectors are not currently available. In the absence of these EUV inspection tools, all available methods for detecting and characterizing defects must be deployed. Based on extensive deployment and on its record for reasonable throughput, 19x nm wavelength inspection is one of the strongest candidates available today for the initial EUV mask inspection approach. However, there are several key challenges with 19x nm optical inspection of EUV masks. Aside from the documented challenges of using a non-actinic wavelength, a key challenge is that the defect sensitivity varies based on pattern sizes and defect types and therefore, a wide range of pattern sizes and defect types need to be used to optimize inspection sensitivity. Through a variety of evaluations on simple test patterns, it has been confirmed that a combination of multiple focus offsets and polarization settings enables adequate sensitivity to meet early sensitivity requirements for 7 nm EUV production masks. As the result, focus offsets and polarization settings could be optimized to successfully develop new inspection recipes that could meet a target defect criteria with multi-pass inspection. [1] In this study, we will show inspection results of programmed defect macros (PDMs) based on actual EUV device constructs. Then, it will be discussed whether a combination of multiple focus offsets and polarizations is an effective approach to increase defect sensitivity on device patterns through the analysis of PDMs. We will demonstrate how inspection parameter optimization can be done to tailor 19x nm inspection to EUV device designs and what defect sizes and types are detectable with a 19x nm inspection system to assess capability for meeting the 7nm node development and production requirements. [1] Kazunori Seki et al., “Minimizing “Tone Reversal” during 19x nm Mask Inspection,” PMJ2018 6-2

Deep ultraviolet (DUV) femtosecond laser repair of Cr binary and phase-shift photomasks is routine and well established over decades of practice. As Moore’s law progresses into sub-10 nm nodes, there is a necessary diversification of lithography technologies which can similarly benefit from the high-throughput, non-contact, contaminate-selective capabilities of ultrashort pulsed laser repair. These alternative lithography masks include extreme ultraviolet (EUV) TaN reflective and DUV SiN-based photomasks. Additionally, parametrically systematic studies are shown with intent to find the limits of selective, sub-resolution, removal of simulated soft defects in various patterns on DUV photomasks.

Mask manufacturers are facing major reticle metrology challenges, driving the need for cost‐effective solutions that provide tighter registration specifications and on‐device registration qualification. E‐beam mask writers’ local registration error may have a critical impact on the error contribution of the reticles to wafer overlay, as it is very local and most likely is not revealed with standard quality control schemes and sampling. The reticle error signatures are, of course, writing‐strategy‐dependent, but may also be caused by residual deflector alignment issues, thus leading to a very local but potentially critical non‐correctable overlay error on the wafer. Since the e‐beam writer strategy does not differ significantly between ArFi masks and EUV masks, we expect a similar error signature for both mask types. We will present data which demonstrates local registration errors that can be correlated to the writing swathes of state‐of‐the‐art e‐beam writers and multi‐pass strategies, potentially leading to systematic device registration errors versus design of close to 2nm. Furthermore, error signatures for local charging and process effects are indicated by local registration measurements resulting in systematic error, also on the order of 2nm. A unique measurement methodology, Local Registration Metrology, is presented that allows for dense sampling of reticle dies to characterize the local e‐beam registration error. Several thousand sites in a region of interest with length and width of a few hundred microns are measured. LMS IPRO metrology algorithms enable parallel registration measurement of all individual sites for fast and accurate metrology. High throughput allows completion of Local Registration measurement within a few minutes instead of exceeding a day of measurement time with conventional registration metrology strategies. This capability enables mask users to add local registration quality control to ensure the local wafer pattern placement error contribution by a mask is within the acceptable tolerance. In addition, based on the results of Local Registration Metrology, e‐beam mask writer corrections via feed forward can now be developed to significantly reduce local overlay error on wafer caused by the reticles.

We have been seeking the energy, the angle and the spatial distribution of electrons present in a scanning electron microscope specimen chamber. The first basic concept of the new electron scattering simulation in this study is that the backscattering yield and the secondary yield agree with their experimental results in a wide range of electron beam energies. By adjusting the parameters of the simulation, the quantitative number of electrons emitted in vacuum is reasonable. The second concept is that the same simulation is applied in the electron scattering phenomena in the objective lens electrode placed opposite the specimen surface. On the assumption that an electric field is applied to the vacuum in between the specimen and the objective lens electrode, deflection of electron trajectory due to the electric field is taken into account. In order to confirm the validity of this simulation, experiments were carried out to measure the number of electrons collected in both electrodes of specimen and of objective lens electrode by applying a bias ranging from -200 V to +200 V to the specimen. The agreement of the simulation result with the experimental value is fairly good, and it is understood that the simulation can be used to express the behavior of electrons inside and outside the material as well as the electron trajectory in vacuum of the scanning electron microscope specimen chamber with considerable accuracy.

In next-generation EUV imaging for foundry N5 dimensions and beyond, inherent pitch- and orientation-dependent effects on wafer level will consume a significant part of the lithography budget using the current Ta-based mask. Mask absorber optimization can mitigate these so-called mask 3D effects. Thin metal absorbers like Ni and Co have been experimentally investigated due to their high EUV absorption, but they pose challenges on the current technology of subtractive mask patterning [1]. A simulation study of attenuated EUV phase shift masks has identified through multiobjective optimization superior imaging solutions for specific use cases and illumination conditions [2]. Evaluating novel EUV mask absorbers evolves on two levels, demonstrating (1) improvements from lithographic perspective and (2) compatibility with the full mask supply chain including material deposition, absorber patterning, scanner environment compatibility and mask lifetime. On the lithographic level, we have identified regions based on the material optical properties and their gain in imaging performance compared to the reference Ta-based absorber. Within each improvement region we engineered mask absorber materials to achieve both the required imaging capabilities, as well as the technical requirements for an EUV mask absorber. We discuss the material development of Te-based alloys and Ag-based layered structures, because of their high EUV extinction. For the attenuated phase shift materials, we start from a Ru-base material, due to its low refractive index, and construct Ru-alloys. On the experimental level, we examined our novel mask absorber materials against an initial mask absorber requirement list using an experimental test flow. Candidate materials are evaluated on film morphology and stability through thermal, hydrogen, EUV loading, and chemical cleaning, for their EUV optical constants by EUV reflectometry, as well as preliminary for selective dry etch. The careful mask absorber evaluation, combining imaging simulations and experimental material tests, allowed us to narrow down to promising combinations for novel EUV mask absorbers.

Over the last several decades, several innovative lithographic approaches have been introduced in an effort to extend device roadmaps for both memory and logic devices. For many years, the emphasis was almost strictly on resolution, with the thought that at some point, conventional reduction optical lithography would be wavelength restricted. The thought process changed around ten years ago however, with the introduction of pitch splitting techniques such as self-aligned patterning and multiple uses of litho/etch (LE) processes. For dense lines, Self-Aligned Double Patterning (SADP) methods extended resolution to about 20nm (half pitch) and was followed by quad patterning processes (SAQP) that could reduce the half pitch to 10nm. Multiple litho/etch processes have already been applied create 20nm half pitch dense contact arrays. Although these pattern multiplication processes have enabled the industry to continue to aggressively scale devices, the methods come with a cost; both technical and financial. The technical price we pay for pitch splitting comes in the way of critical dimension control and additional overlay terms (pitch walking). Despite the precision of our newest deposition and etch processes, the additional process steps used to reduce pitch introduce these types of errors. Any technology (NIL and EUVL for example) that can deliver a single litho step process has the opportunity to deliver a simplified solution with better CD and overlay control. In this work, we review the key elements that go into determining NIL CoO and compare it to existing technology. Two examples are described in detail; sub-19nm half pitch lines and dense 20nm contact arrays. The assumptions used in the model are described, and projections for further reducing CoO are discussed, based on tool throughput, mask life and other key factors.

Nanoimprint lithography manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of widediameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. In this paper, we review the progress and status of the FPA-1200NZ2C wafer imprint system and FPA-1100NR2 mask replication system. To address high volume manufacturing concerns, an FPA-1200NZ2C four-station cluster tool is used in order to meet throughput and cost of ownership requirements (CoO). Throughputs of up to 90 wafers per hour were achieved by applying a multi-field dispense method. Mask life of up to 125 lots, using a contact hole test mask were demonstrated. A mix and match overlay of 3.4 nm has also been achieved and a single machine overlay across the wafer of 2.1nm in X, 1.9nm in Y was also demonstrated. In addition, data is also presented on mask replication. Critical elements of a replication platform include image placement (IP) accuracy and critical dimension uniformity (CDU). Data is presented on both of these subjects. With respect to image placement, an IP accuracy (after removing correctables) of 0.8nm in X, 1.0nm in Y has been demonstrated.

Nanoimprint lithography, NIL, is an attractive low cost lithography technique especially for a non-volatile memory device application. The advantages of NIL are simpler exposure system with no coat/dev track, single process step without SADP/SAQP, less design rule restriction, lower cost-of-ownership, compared with other lithography technologies. NIL working templates are made by the replication of the EB written high quality master templates. Fabrication of high resolution master templates is one of the key items, so as to realize high quality replica templates by carefully controlled replication process. Application of multi-beam mask writer, MBMW, to the NIL master template fabrication is very attractive for the coming generation of the new memory devices. For a fine feature master template such as 1z nm node, shot counts for writing with single beam tool will increase drastically and the writing time is estimated more than days. On the other hand, because of the parallel exposure principle, MBMW can write a master in a certain time for any feature size. In addition, MBMW is suitable for high resolution low sensitivity EB resist, which is evitable for fine feature master fabrication of lines and holes. We applied MBMW for the fabrication sub-15nm feature size templates. A full-field 1x master template was fabricated. In this presentation, we will be discussing master template fabrication process with MBMW and the performance of the template. We will also discuss the replication process with a high resolution master.

This conference presentation, originally published on 10 October 2018, was withdrawn per author request.

Mask Process Correction (MPC) is well established as a necessary step in mask data preparation (MDP) for electron beam mask manufacturing at advanced technology nodes from 14nm and beyond. MPC typically uses an electron scatter model to represent e-beam exposure and a process model to represent develop and etch process effects [1]. The models are used to iteratively simulate the position of layout feature edges and move edge segments to maximize the edge position accuracy of the completed mask. Selective dose assignment can be used in conjunction with edge movement to simultaneously maximize process window and edge position accuracy [2]. MPC methodology for model calibration and layout correction has been developed and optimized for the vector shaped beam (VSB) mask writers that represent the dominant mask lithography technology in use today for advanced mask manufacturing [3]. Multi-beam mask writers (MBMW) have recently been introduced and are now beginning to be used in volume photomask production [4]. These new tools are based on massively parallel raster scan architectures that significantly reduce the dependence of write time on layout complexity and are expected to augment and eventually replace VSB technology for advanced node masks as layout complexity continues to grow [5][6]. While it is expected that existing MPC methods developed for VSB lithography can be easily adapted to MBMW, a rigorous examination of mask error correction for MBMW is necessary to fully confirm applicability of current tools and methods, and to identify any modifications that may be required to achieve the desired CD performance of MBMW. In this paper we will present the results of such a study and confirm the readiness of MPC for multi-beam mask lithography.

Data volume and average data preparation time continue to trend upward with newer technology nodes. In the past decade, with file sizes measured in terabytes and network bandwidth requirements exceeding 40GB/s, mask synthesis operations have expanded their cluster capacity to thousands and even 10s of thousands of CPU cores. Efficient, scalable and flexible management of this expensive, high performance, distributed computing system is required in every stage of geometry processing - from layout polishing through Optical Proximity Correction (OPC), Mask Process Correction (MPC) and Mask Data Preparation (MDP) - to consistently meet tape out cycle time goals. The MDP step, being the final stage in the entire flow, has to write all of the pattern data into one or more disk files. This extremely I/O intensive section remains a significant portion of the processing time and creates a major challenge for the software from a scalability perspective. It is important to have a comprehensive solution that displays high scalability for large jobs and low overhead for small jobs, which is the ideal behavior in a typical production environment. In this paper we will discuss methods to address the former requirement, emphasizing the efficient use of high performance distributed file systems while minimizing the less scalable disk I/O operations. We will also discuss dynamic resource management and efficient job scheduling to address the latter requirement. Finally, we will demonstrate the use of a cluster management system to create a comprehensive data processing environment suitable to support large scale data processing requirements.

Designs which are output by OPC (Optical Proximity Correction) tools contain a large number of jog edges. Jogs are small edges introduced by OPC tools to create segments in an input design edge to provide freedom to the individual segments to move independently. Such segmentation is important to achieve correct, uniform results across the critical dimensions of a feature. Traditionally, Mask Process Correction (MPC) tools which work on OPC output, choose to not move these jog edges (a.k.a. jog freeze). The main reason for doing so is that the jog edges are so small that moving them does not significantly improve the mask quality. However, for newer design nodes, increasing OPC complexity results in primary segments similar in size to jog edge size. Hence, freezing the jogs may not be a viable option as it may mean that a significant portion of design edges are frozen. In this paper, we propose methods for movement of the jog edges and the impact it has on the overall mask quality. Shot count of the mask data post-fracture is an important Quality of Results (QoR) metric for Vector Shaped Beam (VSB) mask writer tools. One of the main advantages that comes from the flexibility of moving jog edges is to improve the mask data shot count. This paper will discuss the shot count improvement method within the MPC tool and show the impact it has on the other quality metrics.

A new class of resist materials has been developed that is based on a family of heterometallic rings. The work is founded on a Monte Carlo simulation that utilizes a secondary and Auger electron generation model to design resist materials for high resolution electron beam lithography. The resist reduces the scattering of incident electrons to obtain line structures that have a width of 15 nm on a 40 nm pitch. This comes at the expense of lowering the sensitivity of the resist, which results in the need for large exposure doses. Low sensitivity can be dramatically improved by incorporating appropriate functional alkene groups around the metal-organic core, for example by replacing the pivalate component with a methacrylate molecule. This increases the resist sensitivity by a factor of 22.6 and demonstrates strong agreement between the Monte Carlo simulation and the experimental results. After the exposure and development processes, what remains of the resist material is a metal-oxide that is extremely resistant to silicon dry etch conditions; the etch selectivity has been measured to be 61:1.

We investigated the effects of molecular weight distribution (molecular weight and dispersity) and developer on the sensitivity and resolution of ZEP series (Zeon Corporation). ZEP520A, ZEP7000, and ZEP530A(under development) are scission-type polymer resists composed of the same structural unit with different molecular weight and dispersity. The sensitivities of ZEP530A (narrow dispersity) and ZEP7000 (high molecular weight) are approximately same and lower than ZEP520A (standard). The resolution of ZEP530A was the highest among the ZEP series.

As the EUV lithography is extending beyond 7nm technology, design to mask strategy becomes more complex. New challenges including advanced OPC and ILT in mask optimization, curvilinear masks, shrinking Mask Rule Checking (MRC), Sub-Resolution Assist Features (SRAF) generation and formation, and other complex mask geometries drive the needs to study this synergy from different stages of the flow from Optical Proximity Correction (OPC), Mask Process Correction (MPC), fracturing, to mask writing and inspection. In this study, different OPC and SRAF mask formations including curvilinear masks, controlled Manhattanized approximations of curvilinear masks, and conventional masks are generated. We illustrate whether curvilinear masks have any demonstrable lithographic benefits. A quantitative comparison of how the Manhattanization impacts mask formation. The image quality metrics such as Image Log Slope (ILS), Process Viability (PV) Band, and Depth of Focus (DOF) from various OPC mask flavors including different MRC settings and different mask forms are compared and discussed. The mask manufacturability study is conducted to identify any major challenges and approaches to minimize, including assessing the value and need for native curvilinear write tool support on a MultiBeam Mask Writer (MBMW) or a single beam Vector Shaped Beam (VSB) mask writer.

Microfabrication techniques, used widely for the construction of integrated circuits, are being used in an increasing variety of non-IC applications requiring features with curved shapes, such as the construction of photonics and microelectromechanical devices. Maintaining the fidelity of curved edges through the photomask fabrication process with tools originally designed to generate shapes with straight edges presents maskmakers with challenging issues of manufacturability and pattern fidelity. This paper will present and discuss various issues on the topic of photomask manufacturability for curvilinear structures; with recommendations for the design and layout of these structures to support photomask manufacturability while maintaining pattern fidelity.

A pellicle is employed to protect a photomask from particle contamination. The pellicle is positioned at a distance from the photomask pattern such that particle contaminants are out of focus. To extend the lifetime of a photomask, the pellicle must be replaced when it becomes heavily contaminated or damaged. The replacement process generally consists of the following three steps, 1) removal of the existing pellicle, 2) cleaning of the photomask, and 3) installation of a new pellicle. The cleaning step is primarily required for the removal of pellicle-glue residue unintentionally left behind during the pellicle removal process. This cleaning step has traditionally employed aggressive chemistries, such as a long process cycle, utilizing a Sulfuric Acid and Hydrogen Peroxide mix (SPM). The major drawback from this approach is that it inadvertently exposes the photomask pattern to aggressive chemistries, risking CD shift, damage to sub-resolution assist features (SRAFs), and accelerated haze growth, thus, ultimately reducing a masks lifetime [1]. To overcome these shortcomings, this paper presents a localized approach for removal of pellicle-glue residue, which does not require long SPM cycles for post-clean.

EUV lithography is being prepared for insertion into the semiconductor production processes to continue the reduction of critical feature sizes at subsequent process nodes. To support that EUV wafer lithography development and production, the EUV photomask infrastructure similarly needs to be ready to support the shipment of EUV photomasks. EUV photomasks will require tighter process controls and tighter defect specifications to meet the requirements necessary for the wafer manufacturing insertion node. The novelty of the EUV lithography process combined with the high degree of complexity of the EUV photomask structure and process each contribute to the tightening of EUV photomask requirements, requiring accurate metrology to ensure fidelity to the photomask specifications. To fully address the industry requirements for EUV defectivity review and actinic mask qualification, ZEISS and the SUNY POLY SEMATECH EUVL Mask Infrastructure consortium have developed and commercialized the EUV aerial image metrology system, the AIMSTM EUV. The first commercial platform is already installed at a customer site and is available to support the EUV photomask production pipeline. This paper shows how the proven technology of the ZEISS aerial image system implemented into the AIMSTM EUV platform supports EUV photomask production in the back end of the line of Intel photomask manufacturing shop. Alongside with describing the essential development phases of the platform at customer site, examples of the reproducible measurement quality, as well as stability of the imaging fidelity of the system in production will be shown. In addition, the system output together with the experience on uptime and availability of the AIMSTM EUV platform in production is presented.

Designed asymmetry amplifies mark centroid sensitivity to variation in pattern dimensions. This enhanced pattern shift response (PSR) enables optical metrology precision to scale inversely with pitch. Embedded bias steps reference the measured PSR variance to design, allowing the PSR to be expressed as an equivalent Design Referenced Deviation (DRD). The shift-to-design correlation slope monitors the evolution of patterning fidelity throughout the process. PSR metrology on ground-rule compatible marks is applied to an example of advanced-node first-metal processing, including EUV lithography, trench etch and CMP.

The mask is a known contributor to intra-field and local patterning fingerprints at the wafer level. Traditionally, a 3σ distribution of critical dimensions (CDs) on mask was sufficient to characterize the contribution to the CD distribution at wafer level. However, as edge placement error (EPE) and EUV wafer patterning stochastics become critical with decreasing feature sizes, wafer CD distributions are being characterized for statistics beyond 3σ. Additionally, Local Placement Error (LPE) is a critical metric that is expected to contribute to EPE. Consequently, it is imperative to understand, characterize and control the EUV mask contributors to the EPE budget. This work is an attempt to extensively characterize the CD and LPE distribution on an EUV mask and identify its impact at wafer level.

With the EUV high volume manufacturing becoming reality and the closing gap of EUV mask infrastructure, EUV lithography is seeing or will shortly see the first production chips being fabricated with EUV. Pilot production in EUV HVM is most likely realized in a mix-and-match process with 193nm techniques. The degree of complexity introduced by the EUV lithographic process is transferred in parallel also to EUV mask: the combination of process sensitive 3D effects and material dependent EUV reflectivity make even the simplest EUV mask what the community is recognizing to be a very complex phase object. The qualification of such a complex piece of Infrastructure as the EUV mask is being addressed from many directions: defect review application is always more backed up by ancillary applications which aim at qualifying the printing behavior of the mask with the fundamental precondition of a full scanner emulation. ZEISS and the SUNY POLY SEMATECH EUVL Mask Infrastructure consortium have developed and commercialized the EUV aerial image metrology platform, the AIMS™ EUV platform, which fully addresses the industry requirements for EUV defectivity review. Additionally, this tool platform allows for mask qualification applications based on the employment of aerial image proven technology. In this paper, the status and recent achievements of the AIMSTM EUV platform will be presented. Promoting the detailed exploration of the aerial image content potential for EUV process understanding and mask qualification, we will present recent results on a printability study of embedded EUV multilayer defects, along with providing further insights into the relevance of mask 3D effects.

One of the challenges of actinic metrology tools for EUV lithography is the availability of light sources with high brightness, stability, and availability. In particular, actinic patterned mask inspection on EUV reticles is considered an essential tool for the EUV lithography ecosystem and it requires an EUV source of high brightness. We present the design of a compact and accelerator-based light source producing EUV radiation with high-brightness for actinic metrology applications in the semiconductor industry. Our design is based on the well-established components and design principles. The specifications required for actinic mask inspection is achieved using a short period undulator and 430 MeV electron energy. The concentric design of storage and booster rings enables stable operation with a relatively small footprint. This study shows the commercial viability of a compact and high-brightness EUV source with high stability and reliability and demonstrates its feasibility for actinic metrology applications.

The purpose of EUV pellicles is to protect the surface of EUV lithography masks from particle contamination. Currently several pellicle prototypes are being developed. It is important to ensure that the optical characteristics of the pellicle membrane do not critically affect the reticle image quality. We present here a study of the impact of a few selected EUV pellicle prototypes on the quality and the contrast of the reticle image obtained with an actinic lensless microscope.

OMOG (opaque MoSi on glass) blank is widely used in advanced masks because of its advantage in high resolution and 3D effect1-2. And the manufacture flow is simple compared to phase shift mask. But the repair of this type mask is a challenge. The OMOG material is sensitive to the etching gas thus the etching rate is much higher than PSM. This article presents a problem, the poor edge roughness after repair in OMOG mask, is also related to the high etching rate. The CD (critical dimension) of advanced masks is very small. If there is some distortion in the features’ edge, the AIMS result is easy out of spec. The poor edge roughness we met usually gets poor AIMS result. To find the reason, we checked the manufacture flow and then focused on three steps: repair process, plasma treated process and short clean. Finally we found the plasma treated process was the main reason, and the clean process also contributed to it. Plasma process makes the mask surface oxidization and the oxide layer is high clean durability. The etching rate of oxide is slower than pure OMOG material, and the oxide layer’s uniformity is not good. The two characteristics lead to different etching ratio in the defect area. This is the reason of the poor edge roughness. If the oxide layer is uniform in the defect area, the problem won’t happen. That’s why not all the masks we repaired met the problem. We also found the removal of the oxide layer by clean process could solve this problem. This is an indirect evidence for explaining the reason.

Nanoimprint lithography (NIL) is one of the highest potential candidates for next generation lithography (NGL) in semiconductors[1][2]. NIL is very useful technology for pattern fabrication in high resolutions and low costs compared to conventional optical lithography[3]. NIL technology makes use of replication from quartz templates. The cross-sectional profile of the template is directly transferred to the resist profile on a wafer. In relationship to that, the management of the cross-sectional profile on the template pattern is much more important than that of photomask[4]. In our past reports, we had studied the performance of measuring cross-sectional profiles using grazing-incidence small-angle X-ray scattering (GISAXS). GISAXS has made it possible to analyze the repeated nanostructure patterns with a 2D X-ray scattering pattern. After much research, we have found the application is very effective using the method of cross-sectional profiling in sub-20 nm half-pitch lines-and-spaces (LS) patterns[5] and additionally in hole patterns[6]. However, regarding the measurement for hole patterns, around a few hours are needed to get one result. We have considered new method for measuring cross-sectional profiles of hole patterns with GISAXS to improve the measurement throughput. We propose the new method to combine GISAXS with SEM images for measuring crosssectional profiles of hole patterns. Using this new method, measurement throughput is achieved less than one hour while almost the same accuracy as the conventional method. We report the results of the cross-sectional profile measurement of hole patterns with new method in comparison to conventional method.

This paper investigates the ability of a novel and bespoke Monte Carlo simulation to model the experimental outcome of exposure of resist materials by electron beam. The resists are a family of organo-metallic Chromium rings (Cr₈F₈(O₂CtBu)₁₆), which have high resolution and low LER making them ideal candidates for the fabrication of the next generation of photomasks for EUV lithography. The model shows how the electron scattering in the resist material and the subsequent production of secondary electrons lead to the resists high resolution. The resist family can be modified to increase speed by up 17.3 times, by replacing the pivalate ligand with a methacrylate ligand, whilst still maintaining their desirable properties.

The number of masks required to produce an integrated circuit has increased tremendously over the past years. The main reason for this is that a single layer mask exposure and etch was no longer sufficient to meet the required pattern density. A solution was found in the application of multi-patterning steps, including multiple masks, before the final pattern is transferred into the underlying substrate. Consequently, the mask-to-mask contribution as part of the overall on-product (intra-layer) overlay budget could not be neglected anymore. While the tight on-product overlay specifications (< 3-nm) were initially only requested for the intra-layer (e.g. multi Litho Etch Litho Etch) overlay performance, recently these tight requirements are also imposed for the layer-to-layer overlay. Recently, we reported on an extensive study in which the mask-to-mask overlay contribution as determined by the PROVE mask registration tool was correlated with actual on-wafer measurements. Two ASML BMMO (Baseliner Matched Machine Overlay) masks were used for this purpose. Initially, no pellicles were mounted onto the masks. An excellent correlation was found between the measurements on the PROVE tool and the on-wafer results reaching R2 > 0.96 with an accuracy of 0.58-nm. The accuracy level can be further improved since all underlying contributors were identified. It was concluded that the expected overlay as measured on-wafer can be fully determined by off-line registration measurements only. An important note is that the off-line registration measurements on the PROVE tool are performed in a static mode, while the exposures on an ASML TWINSCANTM are performed in a dynamic (scanning) mode. No impact was observed since both masks were not equipped with a pellicle. One can expect that also for the case where both masks are equipped with a pellicle of the same type, the impact is negligible. The reason for this is that all pellicle induced errors are likely to be the same for both masks in scanning mode and will cancel out in the overlay. However, the correlation between off-line mask-to-mask overlay measurements and on-wafer measurements is expected to deteriorate when only one of the masks is equipped with a pellicle. Evidence for this was already found even when we operated the scanner in slow scan mode. In this work, we have extended the study by considering the impact of a pellicle on one of the masks and how it affects the intra-field overlay. As a logical consequence, it will have an impact on the correlation between the mask-to-mask and the on-wafer overlay measurements. An experimental technique has been developed to isolate the main impact of a scanning pellicle. We show that, in addition to the mask-to-mask writing errors, the pellicle induced errors can be characterized as well. We demonstrate that the correlation is restored when the pellicle contribution is removed from the on-wafer overlay measurements. The impact of the pellicle on the intra-field overlay performance should be treated as a separate overlay contributor that needs to be minimized separately. Calibration and scanner correction capabilities are in place to mitigate the pellicle induced overlay errors.

With technology node shrinking to 7nm and beyond, EUV lithography has been adopted in most of the advanced manufacture fab. This made the killer defect size become even smaller on both wafer and mask. The optical inspection can’t meet the sensitivity requirement, so e-beam inspection is widely used during wafer fabrication, and started to be used in pattern mask inspection (PMI). However, the drawback of e-beam inspection is low throughput. To achieve both good sensitivity and high throughput, we are developing multiple beam inspector(MBI) to meet industry’s need for EUV lithography. In this paper, we discussed e-beam pattern mask inspection(PMI) and wafer inspection, introduced our most advanced multiple beam technology and next generation multiple beam inspector (MBI) development. We have successfully got 9 images on primary beam module, and also images from secondary electron projection module. We also discussed related technologies, e.g. computation and fast stage technology to further improve throughput and lower COO. At last MBI new applications are discussed.

As the semiconductor industry advances to ever-smaller nodes with finer feature sizes and more complex mask designs, reticle quality and reticle defects continue to be a top mask yield risk. The primary reticle defect quality requirement is defined as “no reticle defects causing 10% or larger CD error on wafer”. Beginning at around the 7 nm Logic node, EUV lithography will start pilot production in several leading fabs. EUV masks stress reticle defectivity requirements for mask shops even more than optical masks due to the larger printing impact from a similar size defect on the mask, and the greater cost and longer cycle time for EUV masks. In a mask shop, generally there are three use cases for a blank inspection system, which are used to monitor and improve mask defectivity; 1) Inspecting process monitor masks, which are used to partition the mask process and identify defect excursions, 2) inspecting ‘witness’ blanks, which are used to measure and control defectivity in each process tool / chamber and 3) inspecting incoming mask blanks to ensure defect-free starting materials for advanced optical and EUV reticles. Traditionally, mask shops have been using bright field confocal technology to perform these tasks. However, due to more stringent defect requirements and the flexibility necessary to support these varied use cases, the industry requires a new approach to drive yield improvements in mask manufacturing. In this paper, we report on the introduction of a new system that provides superior sensitivity, with very high throughput and the flexibility to adapt to many different use cases in a production environment.

EUV Lithography (EUVL) is poised to enter High Volume Lithography (HVM) in the near future. One of the principal challenges in the EUVL implementation for HVM is the availability of necessary clean at wavelength metrology tools. Since the company’s inception in 1997, EUV Tech has pioneered the development of EUV Metrology tools. EUV Tech recently delivered the world’s first EUV Pellicle inspection tool to measure EUV pellicle transmission. This tool provides key measurement information for the qualification of a EUV Pellicle for use in a EUV Scanner. Recent results from measuring a variety of candidate EUV pellicles will be shown to highlight the measurement performance of the tool. This paper will show the measurement performance and data output of the tool, the uses within the photomask development lifecycle, This paper will also discuss our R&D program including new novel tools for accelerated EUV Exposure testing of samples, an EUV Microscope for actinic defect printability review, and scatterometry for mask phase roughness. The improvements in reflectivity and wavelength precision and accuracy of our EUV Reflectometer to meet the requirements of future processing nodes will also be discussed. Key words: EUV, Mask, Pellicle, Metrology tools, Inspection tools, Reflectometer.

The model accuracy for Optical Proximity Correction (OPC) and Inverse Lithography Technology (ILT) applications is a critical factor for patterning success in advanced technology nodes. One difficult challenge has been the accurate and fast simulation of Negative Tone Development (NTD) photoresist processes. It has been widely observed that CD measurements, top-down SEM contour images and X-section or AFM resist side wall profile measurements cannot be adequately predicted by conventional lithography process models, e.g., [1]. Therefore, conventional OPC models were often unable to meet the demanding accuracy requirements of advanced logic or memory manufacturing. A key to achieving the demanding model accuracy requirements in NTD photoresist processes is to consider the photoresist shrinkage effects both in the Post-Exposure-Bake (PEB) step and photoresist development process step. Starting from continuum elastic mechanics, e.g., [2], we have developed a fast and accurate full 3D compact shrinkage model and validated its accuracy and usefulness vs. experimental results for several advanced processes and vs. rigorous simulation using a full physical lattice model. The compact model captures the significant photoresist shrinkage and deformation behaviors such as surface topography, resist sidewall angle (SWA) and layout pattern dependency [3], with much faster runtime capable of use in OPC and ILT mask data optimization. The speed and flexibility of the model are such that it can also be applied to help increase accuracy of simulation for some complex physical behaviors seen in other photoresist processes such as EUV and positive tone develop (PTD) photoresist.

As semiconductor devices become extremely integrated and their geometry continues to shrink, even slight critical dimension (CD) move or phase decay during photomask cleaning may have a negative impact on the CD uniformity performance of photomask. In addition, the printing of sub-resolution assist-features (SRAF) on photomask becomes the main limiting factor in using high power and low frequency Mega-sonic cleaning process, therefore, the balance between SRAF damage and clean performance becomes extremely important. In this research, the CD movement both on Chrome layer and MoSi layer and the phase and transmission decay on MoSi layer of advanced PSM photomask induced by Tetra-Methyl-Ammonium-Hydroxide (TMAH) based cleaning process were studied. Meanwhile, the difference between TMAH and SC1 were emphasized. The results showed that TMAH has significant advantage in CD move and phase decay. We also researched the SRAF damage condition after cleaning by the chemical of TMAH with Multi-Beam and Multi-Frequency (MBMF) mode. In addition, we collected different kinds of particles to study the particle remove capability of TMAH under MBMF mode.

Electron beam Mask Writers based on Variable Shaped Beam lithography (VSB) technology write designs with elementary fragments called shots. The electron dose assigned to each shot is usually defined by mean of a classical e-beam Proximity Effects Correction (PEC) model. However, this model reaches its limits in the case of shots of small size, typically below 50 nm due to machine imperfections. We developed a new “small-shots” model and a related calibration methodology. After calibration, small-shots corrections have been applied on layouts of different complexity using the INSCALE software from Aselta Nanographics. We experimentally demonstrate a 10-fold decrease of Edge Placement Errors (EPE) on photonics and Inverse Lithography Technology structures by using small-shot correction.

For 1xnm node and beyond, even Extreme Ultraviolet Lithography (EUV) technology, the serious geometries distortions of the wafer patterns at new process are forcing chipmakers and foundries to utilize model-based SRAFs for ensuring the accuracy and manufacturability of the chips. Model-based Sub-Resolution Assistant Feature (SRAF) is based on inverse lithography (ILT), which is accurate but time-consuming. Therefore, it is necessary to extract the SRAF rules from model-based results and apply them to full chip layout. In this paper, we put forward a methodology of 2D SRAF rule extraction based on model-based results. We can describe and locate the SRAFs by introducing Projection Region, because it reflect the relationship between the SRAFs and main patterns. And the new concept Elongation can make the properties of SARFs more clearly. The experimental results show that the proposed method can extract the 2D SRAFs accurately and output the rules in a general format. The rule simplifying step can decrease the quantity of 2D SRAF rules through the identification and process of symmetry.

Electron-beam writer characterization is key to enable predictable product performance in a photomask shop. This is traditionally done by writing test patterns with one distinct tool on one blank. Within this article, we introduce a method that reduces uncertainty caused by variation of blanks and process parameters, by using multiple, subsequent electronbeam exposure steps with different same-of-a-kind tools. The method is demonstrated for the disentanglement of two of the most fundamental parameters in an e-beam tool, current density and blanker latency, which together determine the actual dose. Additional accuracy can be achieved by probing the same tool parameter with different methods, which is shown by comparing Critical Dimension Scanning Electron Microscopy of line-space patterns below the maximum shot size with Thin Film Optical Scatterometry of comparatively large pads. The multiple exposure method needs a proper correction of systematic effects caused by contact of exposed areas with air during mask transfer from one writer to another, which are presented and discussed.

EUV lithography draws increasing attention and its expectation is rising. For instance, replacing a triple patterning with ArF immersion lithography to EUV single patterning may reduce 50% of cost and 25% of cycle time [1]. At the same time, the importance of MPC (Mask Process Correction) is also growing [2] [3] [4]. It has become no longer possible to handle recent small and complex features using a rule-based bias approach. It is known that EUV lithography masks have a different structural stack so that “short range effect” of EB proximity effect is observed in mask writing [5]. In this paper, we investigated the above short range effect through MPC model calibration. Mask data preparation step of EUV mask case is performed and the Turn-a-around (TAT) is compared with conventional DUV mask case.

Half-tone masks are essential for process reduction and shape control of photo reactive organic material in FPD, the importance of half-tone masks is increasing in recent large sized and high resolution displays. Half-tone masks are categorized as top layer type and bottom layer type. Process reduction and short term mask production are possible in bottom layer half-tone mask. Therefore it is expected that the demand of bottom layer half-tone mask will be increasing in future. Ulvac coating has developed two types of bottom layer half-tone mask blanks which half-tone layers are composed in Cr material or MoSi material respectively. Since each bottom layer half-tone mask blanks has different advantage in process and characteristics, it is possible to select half-tone mask blank by customer requirement. We will discuss process and characteristics of two types bottom layer half-tone mask blanks in this meeting.

Design weak points that have narrow process window and limits wafer yield, or hotspots, continue to be a major issue in semiconductor photolithography. Resolution enhancement techniques (RET) such as advanced optical proximity correction (OPC) techniques and source mask optimization (SMO) are employed to mitigate these issues. During yield ramp for a given technology node, full-chip lithography simulation, pattern-matching and machine learning are adopted to detect and remedy the weak points from the original design [1], [2]. This is typically an iterative process by which these points are identified in short-loop lithography testing. Design retarget and/or OPC modifications are made to enhance process window until the yield goal is met. This is a high cost and time consuming process that results in a slow yield ramp for existing production nodes and increased time to market (TTM) for new node introduction. Local hotspot correction through mask and wafer harmonization is a method to enhance wafer yield with low cost and short cycle time compared to the iterative method. In this paper, a fast and low cost approach to hotspot correction is introduced. Hotspots were detected on wafer after OPC and characterized by using advanced mask characterization and optimization (AMCO) techniques. Lithographic simulations and AIMS measurement were used to verify the hotspot correction method. Finally, the validity of this new approach was evaluated by process window analysis and circuit probe yield test at wafer.

We propose a deep convolutional neural network named EDGENet to estimate rough line edge positions in low-dose scanning electron microscope (SEM) images corrupted by Poisson noise, Gaussian blur, edge effects and other instrument errors and apply our approach to the estimation of line edge roughness (LER) and line width roughness (LWR). Our method uses a supervised learning dataset of 100800 input-output pairs of simulated noisy SEM rough line images with true edge positions. The edges were constructed by the Thorsos method and have an underlying Palasantzas spectral model. The simulated SEM images were created using the ARTIMAGEN library developed at the National Institute of Standards and Technology. The convolutional neural network EDGENet consists of 17 convolutional, 16 batch-normalization layers and 16 dropout layers and offers excellent LER and LWR estimation as well as roughness spectrum estimation.