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Proceedings of SPIE Volume 8764

VLSI Circuits and Systems VI
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Volume Details

Volume Number: 8764
Date Published: 4 June 2013
Softcover: 31 papers (336) pages
ISBN: 9780819495617

Table of Contents
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Front Matter: Volume 8764
Author(s): Proceedings of SPIE
A 2.5 Gb/s low-voltage CMOS fully-differential adaptive equalizer
Author(s): C. Gimeno; E. Guerrero; C. Aldea; S. Celma
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Reducing flicker noise up-conversion in a 65nm CMOS VCO in the 1.6 to 2.6 GHz band
Author(s): Federico Pepe; Andrea Bonfanti; Salvatore Levantino; Carlo Samori; Andrea Leonardo Lacaita
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Energy harvesting with piezoelectric applied on shoes
Author(s): Enrico Camilloni; Mirko Carloni; Marco Giammarini; Massimo Conti
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A 1.2 V low-power OpAmp for integrated lock-in amplifiers
Author(s): M. R. Valero; S. Celma; N. Medrano; B. Calvo; C. Gimeno
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FPGA-based implementation for steganalysis: a JPEG-compatibility algorithm
Author(s): E. Gutierrez-Fernandez; M. Portela-García; C. Lopez-Ongil; M. Garcia-Valderas
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Implementation of scalable video coding deblocking filter from high-level SystemC description
Author(s): Pedro P. Carballo; Omar Espino; Romén Neris; Pedro Hernández-Fernández; Tomasz M. Szydzik; Antonio Núñez
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Processor core for real time background identification of HD video based on OpenCV Gaussian mixture model algorithm
Author(s): Mariangela Genovese; Ettore Napoli
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Network-on-chip emulation framework for multimedia SoC development
Author(s): Garbí Singla; Félix Tobajas; Valentín de Armas
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Protocol-level noise analysis of networked systems based on simulation/analytical approach
Author(s): Giovanni B. Vece; Eros Mazza; Massimo Conti
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A simulation technique to compute phase noise induced from cyclostationary noise sources in RF oscillators
Author(s): Federico Pepe; Andrea Bonfanti; Salvatore Levantino; Paolo Maffezzoni; Carlo Samori; Andrea Leonardo Lacaita
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An IOMMU for hardware-assisted full virtualization of heterogeneous multi-core SoCs
Author(s): G. Kornaros; K. Harteros; M. Astrinaki; I. Christoforakis; M. Coppola; M. D. Grammatikakis
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A low-cost PSoC architecture for long FFT
Author(s): Pietro Angelo Lomoio; Pasquale Corsonello
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High speed Radix-4 soft-decision Viterbi decoder for MB-OFDM UWB system
Author(s): Guixuan Liang; Jorge Portilla; Teresa Riesgo
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A comparative study of continuous-time analog adaptive equalizers
Author(s): C. Sánchez-Azqueta; C. Gimeno; S. Celma
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Architectural evaluation of dynamic and partial reconfigurable systems designed with DREAMS tool
Author(s): Andrés Otero; Ángel Gallego; Eduardo de la Torre; Teresa Riesgo
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Virtual platform for power and security analysis of wireless sensor network
Author(s): A. Diaz.; J. Gonzalez-Bayon; P. González de Aledo Marugán; P. Sanchez
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A hierarchical scheduling and management solution for dynamic reconfiguration in FPGA-based embedded systems
Author(s): T. Cervero; A. Gómez; S. López; R. Sarmiento; J. Dondo; F. Rincón; J. C. López
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Efficient and decentralized data transfer architecture for component based embedded systems
Author(s): David de la Fuente; Jesús Barba; Julio Dondo; Fernando Rincón; María J. Santofimia; Juan Carlos López
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Hardening digital systems with distributed functionality: robust networks
Author(s): Anna Vaskova; Marta Portela-Garcia; Mario Garcia-Valderas; Celia López-Ongil; Jorge Portilla; Juan Valverde; Eduardo de la Torre; Teresa Riesgo
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Fault tolerant architectures by partial reconfiguration
Author(s): Luis Andrés Cardona; Yi Guo; Carles Ferrer
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Introduction on performance analysis and profiling methodologies for KVM on ARM virtualization
Author(s): Antonios Motakis; Alexander Spyridakis; Daniel Raho
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OPC mask simplification using over-designed timing slack of standard cells
Author(s): Yifan Qu; Chun Huat Heng; Arthur Tay; Tong Heng Lee
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A micropower supervisor for wireless nodes with a digital pulse frequency modulator battery monitor
Author(s): Mirko Carloni; Rocco d'Aparo; Pierpaolo Scorrano; Berardo Naticchia; Massimo Conti
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Wireless sensor network for wide-area high-mobility applications
Author(s): Ignacio del Castillo; Roberto Esper-Chaín; Félix Tobajas; Valentín de Armas
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Intelligent microchip networks: an agent-on-chip synthesis framework for the design of smart and robust sensor networks
Author(s): Stefan Bosse
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STAR: FPGA-based software defined satellite transponder
Author(s): Daniele Davalle; Riccardo Cassettari; Sergio Saponara; Luca Fanucci; Luca Cucchi; Franco Bigongiari; Walter Errico
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Transmission line pulse system for avalanche characterization of high power semiconductor devices
Author(s): Michele Riccio; Giovanni Ascione; Giuseppe De Falco; Luca Maresca; Martina De Laurentis; Andrea Irace; Giovanni Breglio
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State of the art direct digital frequency synthesis methodologies and their performance on FPGA
Author(s): Mariangela Genovese; Ettore Napoli
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Rectennas design using DG-MOSFETs
Author(s): Raúl Rodríguez; B. González; J. García; M. Marrero-Martín; A. Hernández
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MPPM system for indoor wireless optical communications with angle-diversity detection
Author(s): A. García-Viera; S. Rodríguez; B. R. Mendoza; O. González; A. Ayala
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Design and optimization of an RF energy harvesting system from multiple sources
Author(s): Mai Ali; Lutfi Albasha; Nasser Qaddoumi
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