This PDF file contains the front matter associated with SPIE Proceedings Volume 8267, including the Title Page, Copyright information, Table of Contents, and the Conference Committee listing.

A low cost, blind mate, injection molded optical backplane is presented. The optical backplane is comprised of 12 channel optical broadcast buses, operating at 10Gbps/channel with six blindmate optical output ports spaced 1U apart.

In this paper, we evaluate the performance of polymer multimode waveguide and metallic hollow core waveguide for complicated board level optical interconnect structures such as optical bus. Numerical simulation suggests that metallic hollow core waveguide with 50μmx50μm dimension can provide acceptable optical propagation loss as low as 0.045dB/cm, less than 0.5dB bending loss per 180 degree turning with 5mm radius, 0.25dB extra splitting loss, and a large tolerance to angular deviation of the micro-mirror coupler. The conclusion is that silver coated metallic hollow core waveguide will be a better choice for board level optical bus than conventional polymer multimode waveguide.

A parallel board-level interconnection design is presented consisting of 32 channels, each operating at 10 Gbps. The hardware uses available optoelectronic components (VCSEL, TIA, pin-diodes) and a combination of planarintegrated free-space optics, fiber-bundles and available MEMS-components, like the DMD™ from Texas Instruments. As a specific feature, we present a new modular inter-board interconnect, realized by 3D fiber-matrix connectors. The performance of the interconnect is evaluated with regard to optical properties and power consumption. Finally, we discuss the application of the interconnect for strongly distributed system architectures, as, for example, in high performance embedded computing systems and data centers.

With the technology trend of using optical interconnects as an alternative to traditional copper interconnects, basic elements such as waveguides and waveguide bus structure are studied worldwide. A novel 3-node bi-directional 50μm optical waveguide bus architecture with embedded mirrors is proposed and fabricated on flexible substrate. The fabrication is achieved by lithography-free molding. Different from other replicating methods, the mold demonstrated here is a nickel metal mold achieved by low cost electroplating and can be used repeatedly. The data transmission test up to 10Gbps using vertical cavity surface emitting laser (VCSEL) has been performed to evaluate the device. The results show that the device is capable of emitting and receiving high speed data. Thus it can serve as a high performance optical backplane. Such mold fabrication technology can also be applied to smaller features size structure. The molds of 5μm wide waveguides and photonic crystal waveguide structures with 250nm hole size are fabricated and the molded structure profiles are shown.

This paper describes an advanced optical link model composed of multimode waveguide that is used to aid the development of low-power, high-density, and high-speed multi-channel interconnects. The model consists of a VCSEL, a pair of multi-channel rectangular step-index (SI) or graded-index (GI) type optical waveguides, a graded-index multimode fiber (GI MMF), and a photo detector. Here we assume that each waveguide is integrated on a printed circuit board (PCB), and these two PCBs are connected by the GI MMF ribbon (board-to-board interconnection). Then, we focus on the connection of these link components. For optical links with low-power consumption, the link penalty should be minimized. In this paper, the benefits of GI waveguides over SI waveguides are investigated, particularly about the coupling losses. We start the analysis using the fundamental ray optics. The rays emit from a VSCEL with Gaussian angular intensity distribution. Both between the laser source and the waveguide (Tx side), and between the waveguide and the photodiode (Rx side), a 50 μm gap is assumed, which is filled with a uniform medium with similar refractive index to the core center for the purpose of reducing the Fresnel reflection loss. Furthermore, the two waveguides are connected by a GI MMF, which guides the light from the Tx side to the Rx side. The characteristics such as near field pattern (NFP) and connection loss are addressed. The calculated results show the GI waveguides confine the lightwave intensity near the core center more tightly than the SI waveguide, which result in lower coupling loss (0.46 dB for GI waveguide vs. 1.35 dB for the SI counterpart) between the 35 μm core size waveguides and the 35 μm diameter photo diode (PD). This calculation helps us to characterize the high performance optical link with a more reliable model.

Photonic Integrated Circuits (PICs) have been dichotomized into circuits with high passive content (silica and silicon PLCs) and high active content (InP tunable lasers and transceivers) due to the trade-off in material characteristics used within these two classes. This has led to restrictions in the adoption of PICs to systems in which only one of the two classes of circuits are required to be made on a singular chip. Much work has been done to create convergence in these two classes by either engineering the materials to achieve the functionality of both device types on a single platform, or in epitaxial growth techniques to transfer one material to the next, but have yet to demonstrate performance equal to that of components fabricated in their native substrates. Advances in waferbonding techniques have led to a new class of heterogeneously integrated photonic circuits that allow for the concurrent use of active and passive materials within a photonic circuit, realizing components on a transferred substrate that have equivalent performance as their native substrate. In this talk, we review and compare advances made in heterogeneous integration along with demonstrations of components and circuits enabled by this technology.

A 25-Gbps high-sensitivity optical receiver with a 10-Gbps photodiode (PD) using inductive input coupling has been demonstrated for optical interconnects. We introduced the inductive input coupling technique to achieve the 25-Gbps optical receiver using a 10-Gbps PD. We implemented an input inductor (Lin) between the PD and trans-impedance amplifier (TIA), and optimized inductance to enhance the bandwidth and reduce the input referred noise current through simulation with the RF PD-model. Near the resonance frequency of the tank circuit formed by PD capacitance, Lin, and TIA input capacitance, the PD photo-current through Lin into the TIA is enhanced. This resonance has the effects of enhancing the bandwidth at TIA input and reducing the input equivalent value of the noise current from TIA. We fabricated the 25-Gbps optical receiver with the 10-Gbps PD using an inductive input coupling technique. Due to the application of an inductor, the receiver bandwidth is enhanced from 10 GHz to 14.2 GHz. Thanks to this wide-band and low-noise performance, we were able to improve the sensitivity at an error rate of 1E-12 from non-error-free to -6.5 dBm. These results indicate that our technique is promising for cost-effective optical interconnects.

In this paper, a bi-directional 4-channel x 10-Gbps optoelectronic transceiver based on this silicon optical bench (SiOB) technology is developed. A bi-directional optical sub-assembly (BOSA), fiber ribbon assembly, PCB with high frequency trace design, transmitter driver, and receiver TIA IC are included in this transceiver. The BOSA and PCB also have some specific design for conventional chip-on-board (COB) process. In eye diagram measurement, the transmitter can pass 10-G Ethernet eye mask with 25% margin at room temperature; Bit-error-rate (BER) performance from the transmitter to receiver via 10-meter fiber can achieve 10^-12 order, which confirm the transceiver's ability of 10-Gbps data transmission per a channel.

Avionics has experienced an ever increasing demand for processing power and communication bandwidth. Currently deployed avionics systems require gigabit communication using opto-electronic transceivers connected with parallel optical fiber. Ultra Communications has developed a series of transceiver solutions combining ASIC technology with flip-chip bonding and advanced opto-mechanical molded optics. Ultra Communications custom high speed ASIC chips are developed using an SoS (silicon on sapphire) process. These circuits are flip chip bonded with sources (VCSEL arrays) and detectors (PIN diodes) to create an Opto-Electronic Integrated Circuit (OEIC). These have been combined with micro-optics assemblies to create transceivers with interfaces to standard fiber array (MT) cabling technology. We present an overview of the demands for transceivers in military applications and how new generation transceivers leverage both previous generation military optical transceivers as well as commercial high performance computing optical transceivers.

Optical interconnects may provide solutions to the capacity-bandwidth trade-off of recent memory interface systems. For cost-effective optical memory interfaces, Samsung Electronics has been developing silicon photonics platforms on memory-compatible bulk-Si 300-mm wafers. The waveguide of 0.6 dB/mm propagation loss, vertical grating coupler of 2.7 dB coupling loss, modulator of 10 Gbps speed, and Ge/Si photodiode of 12.5 Gbps bandwidth have been achieved on the bulk-Si platform. 2x6.4 Gbps electrical driver circuits have been also fabricated using a CMOS process.

In this paper, we demonstrate the practicality of using silicon nanomembranes for use in high performance flexible photonic interconnects and devices. Using two silicon nanomembrane transfer schemes, we demonstrate successful transfer of several photonic building blocks including large aspect ratio (>4000) and long (>5cm) strip waveguides, band engineered slow light (n_g > 30) photonic crystal waveguides, 1xN (1x2 and 1x6) multimode interference couplers etc, on a flexible Kapton polyimide substrate. A two-step cleaving method is also developed and implemented to facilitate testing of the transferred flexible photonic components for the first time. Upon cleaving, the propagation loss in transferred ultralong strip waveguide (~5.7cm) is found to be 1.1dB/cm, which is comparable to that of waveguides on SOI.

We experimentally demonstrate a simple but more efficient technique to modulate and multiplex multiple WDM channels. Our design is based on a bus waveguide vertically coupled to multiple Photonic Crystal (PhC) resonator, each of which modulates an individual channel in place. The Photonic crystal resonator modulator provide very low switching energies (~fJ) while the bus waveguide can be made from a material with a low refractive index thereby allowing very efficient coupling with an optical fiber.

For further advancement of next-generation high-performance computers, low-power consumption, high-density, and low-cost optical interconnection technologies should be adopted, and thus, optical printed circuit boards (O-PCBs) integrating polymer optical waveguides would be a key device. In particular, for low-power consumption, the link power budget should be low enough. In the optical link that consists of two waveguides on PCBs and a graded-index (GI) multimode fiber (MMF) connecting the two PCBs, such a low power budget is expected when GI-core waveguides are utilized. Essentially low coupling loss between the GI-core waveguide and a GI-MMF is one of the reasons of the low power budget, since the mode power profile mismatch between MMFs and GI-core waveguides is smaller than that between MMFs and SI-core waveguides. In this paper, we compose an optical link of vertical cavity surface emitting laser (VCSEL)-waveguide: SI or GI-MMF-waveguide: SI or GI-PD, and quantitatively evaluate the coupling loss at each connection point. When all the components are perfectly aligned, the total coupling loss is 1.9 dB in the link with GI-core waveguide. On the other hand, the SI-core waveguide link shows 0.8 dB higher coupling loss (2.72dB) than the GI-core waveguide link. When a misalignment of ±10 μm is added at each connection and 50-μm gaps are added at both VCSEL-waveguide and waveguide-PD connections, the GI-waveguide link demonstrate approximately 2-dB advantage in the power budget over the SI-waveguide link. Given limited power budget consideration for high bit rate optical links (~25 Gb/s), GI-core waveguide enabling low link power budget would be a promising component for O-PCBs.

The introduction of optical interconnect technology is expected to solve problems of conventional electric wiring. One of the promising technologies realizing optical interconnect is the self-written waveguide (SWW) technology with lightcurable resin. We have developed a new technology of the "Mask-Transfer Self-Written (MTSW)" method. This new method enables fabrication of arrayed M x N optical channels at one shot of UV-light. Using this technology, several new optical interconnect devices and connection technologies have been proposed and investigated. In this paper, first, we introduce MTSW method briefly. Next, we show plug-in alignment approach using optical waveguide plugs (OWP) and a micro-hole array (MHA) which are made of the light-curable resin. Easy and high efficiency plug-in alignment between fibers and an optoelectronic-printed wiring board (OE-PWB), between a fiber and a VCSEL, so on will be feasible. Then, we propose a new three-dimensional (3D) branch waveguide. By controlling the irradiating angle through the photomask aperture, it will be possible to fabricate 2-branch and 4-branch waveguides with a certain branch angle. The 3D branch waveguide will be very promising in the future optical interconnects and coupler devices of the multicore optical fiber.

The large bandwidth demand in long-distance telecom networks lead to single-mode fiber interconnects as result of low dispersion, low loss and dense wavelength multiplexing possibilities. In contrast, multi-mode interconnects are suitable for much shorter lengths up to 300 meters and are promising for optical links between racks and on board level. Active optical cables based on multi-mode fiber links are at the market and research in multi-mode waveguide integration on board level is still going on. Compared to multi-mode, a single-mode waveguide has much more integration potential because of core diameters of around 20% of a multi-mode waveguide by a much larger bandwidth. But light coupling in single-mode waveguides is much more challenging because of lower coupling tolerances. Together with the silicon photonics technology, a single-mode waveguide technology on board-level will be the straight forward development goal for chip-to-chip optical interconnects integration. Such a hybrid packaging platform providing 3D optical single-mode links bridges the gap between novel photonic integrated circuits and the glass fiber based long-distance telecom networks. Following we introduce our 3D photonic packaging approach based on thin glass substrates with planar integrated optical single-mode waveguides for fiber-to-chip and chip-to-chip interconnects. This novel packaging approach merges micro-system packaging and glass integrated optics. It consists of a thin glass substrate with planar integrated singlemode waveguide circuits, optical mirrors and lenses providing an integration platform for photonic IC assembly and optical fiber interconnect. Thin glass is commercially available in panel and wafer formats and characterizes excellent optical and high-frequency properties. That makes it perfect for microsystem packaging. The paper presents recent results in single-mode waveguide technology on wafer level and waveguide characterization. Furthermore the integration in a hybrid packaging process and design issues are discussed.

With the ever-increasing demand for board-to-board optical data communications, the correlation between waveguide surface end roughness and coupling losses must be thoroughly investigated. This study measures end roughness of siloxane polymer optical waveguides in terms of optical coupling losses. Siloxane Polymers from Dow Corning were used to fabricate 50 x 50 μm rectangular waveguides through photolithographic processes. Edge roughness was controlled through various grades of fiber-optic polishing films and then measured using interferometric microscopy (IFM). Controlled lab results are compared with industrial polishing techniques that are consistent with mass-production methods. Electromagnetic modeling revealed correlations between experimental and theoretical results.

This paper describes the development, termination and performance of next generation optical backplane interconnect components. This low cost, dense optical interconnect technology combined with recent advances in 10G/lane and beyond, miniature imbedded Tx/Rx devices is driving bandwidth density to unprecedented levels. A monolithic, multi-fiber ferule with integrated collimating lenses was designed with the same overall footprint as a traditional MT-type, multi-fiber rectangular ferrule. The new optical ferrule was designed with precision micro holes for alignment to the lens array allowing for incorporation of multiple rows of fibers into single ferrule unit. The design supports up to four rows with as many as 16 fibers per row for a total potential lane count of up to 64 within in a single ferrule. A low cost termination is achieved by securing precision-cleaved fiber arrays into the rear of the ferrule with a quick-cure, index matched, UV light activated epoxy. The elimination of a polished fiber array greatly reduces the cost and complexity associated with physical contact based multi-fiber interconnects. With the same overall footprint as an MT ferrule, the new, lens-based ferrule can be used in conjunction with MPO and other MT based connectors. However, by eliminating the need for physical contact via the use of collimated light beams, the connection force per ferrule required is greatly reduced, paving the way for high ferrule counts and mass insertion of dense optical backplanes. Mated pairs of the new ferrule were tested for insertion loss with the substitution method and all channels were <1dB.

One of the important challenges for the deployment of the emerging breed of nanotechnology components is interfacing them with the external world, preferably accomplished with low-cost micro-optical devices. For the fabrication of this kind of micro-optical components, we make use of deep proton writing (DPW) as a generic rapid prototyping technology. DPW consists of bombarding polymer samples with swift protons, which results after chemical processing steps in high quality micro-optical components. The strength of the DPW micro-machining technology is the ability to fabricate monolithic building blocks that include micro-optical and mechanical functionalities which can be precisely integrated into more complex photonic systems. In this paper we give an overview of the process steps of the technology and we present several examples of micro-optical and micro-mechanical components, fabricated through DPW, targeting applications in printed circuit baordlevel optical interconnections. These include: high-precision 2-D fiber connectors, discrete out-of-plane coupling structures featuring high-quality 45° and curved micro-mirrors, arrays of high aspect ratio micro-pillars and backplane connectors. While DPW is clearly not a mass fabrication technique as such, one of its assets is that once the master component has been prototyped, a metal mould can be generated from the DPW master by applying electroplating. After removal of the plastic master, this metal mould can be used as a shim in a final microinjection moulding or hot embossing step. This way, the master component can be mass-produced at low cost in a wide variety of high-tech plastics.

Polymer waveguides with 45° mirrors are fabricated by vacuum assisted microfluidic (VAM) soft lithographic technique for card-to-backplane optical interconnect applications. Waveguide array structures with inclined surfaces in SU-8 photoresist for PDMS mold are fabricated by prism assisted UV exposure. Sample surface reflected UV light is utilized to eliminate undercut structures and to accomplish the inclined mirror surfaces on both ends of the straight waveguide segments by one-step UV exposure. Polymer waveguides with 45° embedded mirrors demonstrated about 0.49 dB/cm propagation loss and 67% mirror coupling efficiency.

In short-range interconnect applications, one question arises frequently: When should optical solutions be chosen over electrical wiring? The answer to this question of course depends on several factors like costs, performance, reliability, availability of testing equipment and knowledge about optical technologies, and last but not least, it strongly depends on the application itself. Networking in high performance computing (HPC) is one such example. With bit rates around 10 Gbit/s per channel and cable length above 2 m, the high attenuation of electrical cables leads to a clear preference of optical or active optical cables (AOC) for most planned HPC systems. For AOCs, the electro-optical conversion is realized inside the connector housing, while for purely optical cables, the conversion is done at the edge of the board. Proceeding to 25 Gbit/s and higher, attenuation and loss of signal quality become critical. Therefore, either significantly more effort has to be spent on the electrical side, or the package for conversion has to be integrated closer to the chip, thus requiring new packaging technologies. The paper provides a state of the art overview of packaging concepts for short range interconnects, it describes the main challenges of optical package integration and illustrates new concepts and trends in this research area.

We present the design and fabrication of a complete optical interconnection scheme including the optoelectronic package, containing driving Vertical Cavity Surface Emitting Lasers (VCSELs) and read-out photodiode (PDs), the coupling scheme of the fiber or waveguide interconnect and the fabrication technology of the waveguide structures itself. Both the optoelectronic package and the waveguide part are fabricated using polymer materials resulting in a low-cost, flexible interconnection scheme. The optoelectronic package consists of an ultra-thin (20 μm) chip embedded in a flexible polymer stack, connected through metalized microvias using thin film deposition steps. A 45° deflecting micromirror is used to couple this optoelectronic package to an optical fiber or an optical waveguide. The waveguiding structures can be integrated with the coupling plug leading to a 1 step alignment process which significantly reduces the coupling losses. Flexible and stretchable multimode polymer waveguides are also developed to end up with a fully flexible optical interconnect for short (waveguide) or long distance (fiber) communication or for application in sensing.

We demonstrate a new approach to increase the optical interconnection bandwidth density by stacking the opto-electrical dies directly on the CMOS driver. The suggested implementation is aiming to provide a wafer scale process which will make the use of wire bonding redundant and will allow for impedance matched metallic wiring between the electronic driving circuit and its opto-electronic counter part. We suggest the use of a thick photoresist ramp between CMOS driver and opto-electrical dies surface as the bridge for supporting co-plannar waveguides (CPW) electrically plated with lithographic accuracy. In this way all three dimensions of the interconnecting metal layer, width, length and thickness can be completely controlled. In this 1^st demonstration all processing is done on commercially available devices and products, and is compatible with CMOS processing technology. To test the applicability of CPW instead of wire bonds for interconnecting the CMOS circuit and opto-electronic chips, we have made test samples and tested their performance at speeds up to 10 Gbps. In this demonstration, a silicon substrate was used on which we evaporated gold co-planar waveguides (CPW) to mimic a wire on the driver. An optical link consisting of a VCSEL chip and a photodiode chip has been assembled and fully characterized using optical coupling into and out of a multimode fiber (MMF). A 10 Gb/s 2⁷-1 NRZ PRBS signal transmitted from one chip to another chip was detected error free. A 4 dB receiver sensitivity penalty is measured for the integrated device compared to a commercial link.

Self-organization of optical waveguides that connect two optical devices automatically through, a reflective self-organized lightwave network (R-SOLNET) using a phosphor was simulated by the finite difference time domain (FDTD) method. The simulation showed that a R-SOLNET is constructed between a waveguide with a core width of 1.2 μm and a phosphor target, which is located a distance of 6.4 μm from the waveguide edge, and guides the probe beam to the phosphor target. The optical coupling efficiency was 95% when the waveguide and phosphor target were fully aligned. Even when the misalignment was 800 nm, a coupling efficiency of 60% was obtained. The coupling efficiency for the SOLNET without the phosphor target was 16%. In addition, experiments to confirm the principle of a R-SOLNET using a phosphor were performed with an optical fiber and tris(8-hydroxyquinolinato) aluminum (Alq₃) phosphor target. The experiments revealed that the write beam is propagated toward the Alq3 target, and consequently, a R-SOLNET connecting the fiber edge and Alq₃ target is formed to guide probe beams to the target. The R-SOLNET expanded from the diameter of the fiber core to the width of the Alq₃ target.

Based on well-known laws of physics, a lower bound on the energy-per-bit required for transmitting information using a photonic channel is established. The analysis includes the energy required to convert information from the electronic to the photonic domain and back. We investigate links that employ a directly modulated laser as well as links that employ an external modulator. It is shown that the power dissipation of the channel also imposes a bound on the maximum bandwidth density for a photonic link. Keeping this in mind, opportunities for optics in computing systems are discussed, especially from a systems perspective.

High Performance Computing (HPC) systems are putting ever-increasing demands on the throughput efficiency of their interconnection fabrics. In this paper, the limits of conventional metal trace-based inter-chip interconnect fabrics are examined in the context of state-of-the-art HPC systems, which currently operate near the 1 GFLOPS/W level. The analysis suggests that conventional metal trace interconnects will limit performance to approximately 6 GFLOPS/W in larger HPC systems that require many computer chips to be interconnected in parallel processing architectures. As the HPC communications bottlenecks push closer to the processing chips, integrated Optical Interconnect (OI) technology may provide the ultra-high bandwidths needed at the inter- and intra-chip levels. With inter-chip photonic link energies projected to be less than 1 pJ/bit, integrated OI is projected to enable HPC architecture scaling to the 50 GFLOPS/W level and beyond - providing a path to Peta-FLOPS-level HPC within a single rack, and potentially even Exa-FLOPSlevel HPC for large systems. A new hybrid integrated chip-scale OI approach is described and evaluated. The concept integrates a high-density polymer waveguide fabric directly on top of a multiple quantum well (MQW) modulator array that is area-bonded to the Silicon computing chip. Grayscale lithography is used to fabricate 5 μm x 5 μm polymer waveguides and associated novel small-footprint total internal reflection-based vertical input/output couplers directly onto a layer containing an array of GaAs MQW devices configured to be either absorption modulators or photodetectors. An external continuous wave optical "power supply" is coupled into the waveguide links. Contrast ratios were measured using a test rider chip in place of a Silicon processing chip. The results suggest that sub-pJ/b chip-scale communication is achievable with this concept. When integrated into high-density integrated optical interconnect fabrics, it could provide a seamless interconnect fabric spanning the intra-

In this manuscript we study the potentials of nanophotonics on-chip integration and propose a set of automation methodologies to construct low power on-chip interconnect with flexible geometry shapes. We show that with such techniques, a systematic design aid environment can be developed to generate optimized integration configurations meanwhile honoring complex sets of photonic device constraints. Due to their unique characteristics, not only do these techniques benefit the optimization of on-chip photonic networks, but also they can be efficiently applied to build low-power high-throughput application specific ICs with opto-electrical interconnection.

We present a method of designing a grating outcoupler to obtain the desired 1D- and 2D-intensity profile of the optical beam emitted by a grating coupled surface emitting laser. The method is based on variation of the periodicity, duty cycle, and the groove tilt angle of the grating. Grating design involves numerical analysis of the optical field propagated through the grating, by applying the Rigorous Coupled Wave Approach method. Experimental evaluation of the designed grating components was done by fabrication and testing the broad area semiconductor lasers with the monolithically integrated grating outcouplers. We also present a grating design which provides the spreading of a single optical output into multi-beams at different outcoupling angles in the emitting plane.

In this work, we develop a simple and high-speed VCSEL driving technique with "virtual back termination" for optical interconnect applications. For achieving compact and high-speed optical interconnects, an optical module with the flipchip bonding structure is effective. To realize flip-chip mounting, the development of the VCSEL driving technique, which can perform impedance matching with the transmission line, is a critical issue. Back termination has to be implemented to reduce signal reflection via the transmission line. Additionally, back termination must have a simple dc coupling. Introducing a virtual GND to the circuit ensures that these requirements are met. The virtual GND is made by a dummy load connected to a complementary output and dc-coupled 50-Ω resisters between output and complementary output. The dummy load has characteristics similar to the load VCSEL. As a result of the virtual GND, the resisters act as the back termination. When we drove the VCSEL with this technique, clear eye opening without the reflectance effects was obtained up to 28-Gb/s despite using a 10-cm transmission These results show that our driving technique is suitable for high-speed optical interconnect applications.

Millimeter-wave wireless interconnects is an emerging technology for ultra-short-reach off-chip transmission, providing spatial flexibility and power-efficient high-speed data transportation. Integrated with carrier-over-fiber technology, we propose a low-phase-noise multi-wireless-transceiver architecture to improve the bit-error-rate performance of conventional wireless interconnects. Multiplexing schemes, including frequency division multiplexing, spatial multiplexing, and beam isolation, can be facilitated by carrier-over-fiber techniques. We introduce a potential application of the multi-input-multi-output high-speed analog multiplexing with open-loop analog circuits and digital feedback.

Multimode fibers (MMFs) are limited in data rate capabilities owing to modal dispersion. However, their large core diameter simplifies alignment and packaging, and makes them attractive for short and medium length links. Recent research has shown that the use of signal processing and techniques such as multiple-input multiple-output (MIMO) can greatly improve the data rate capabilities of multimode fibers. In this paper, we review recent experimental work using MIMO and signal processing for multimode fibers, and the improvements in data rates achievable with these techniques. We then present models to design as well as simulate the performance benefits obtainable with arrays of lasers and detectors in conjunction with MIMO, using channel capacity as the metric to optimize. We also discuss some aspects related to complexity of the algorithms needed for signal processing and discuss techniques for low complexity implementation.

The idea of integrating a light emitter and detector in the cost effective and mature technology which is CMOS remains an attractive one. Silicon light emitters, used in avalanche breakdown, are demonstrated to switch at frequencies above 1 GHz whilst still being electrically detected, a three-fold increase on previous reported results. Utilizing novel BEOLstack reflectors and increased array sizes have resulted in an increased power efficiency allowing multi-Mb/s data rates. In this paper we present an all-silicon optical communication link with data rates exceeding 10 Mb/s at a bit error rate of less than 10^-12, representing a ten-fold increase over the previous fastest demonstrated silicon data link. Data rates exceeding 40 Mb/s are also presented and evaluated. The quality of the optical link is established using both eye diagram measurements as well as a digital communication system setup. The digital communication system setup comprises the generation of 2³²-1 random data, 8B/10B encoding and decoding, data recovery and the subsequent bit error counting.

A strongly guided InP/InGaAsP multimode interference power splitter is designed and simulated by using 3D FD-BPM method. A 1-by-4 multimode interference power splitter is fabricated in terms of the simulation result. The device has 40nm available bandwidth and 2.6dB pass band flatness around 1550nm. Furthermore, the insertion loss and the uniformity of the MMI power splitter is no higher than 10dB and 0.08dB at the designed wavelength 1550nm, respectively.

Transmitting part of optical interconnection module with three-dimensional optical path is demonstrated. In this module, electronic-device and photonic-device are separated on the front and rear sides of SOI substrate. The key component of this module are 45° micro reflector and trapezoidal waveguide which are fabricated by single-step wet etching on front side of SOI substrate. High-frequency transmission lines for 4-channel × 2.5-GHz and VCSELs are constructed on rear side of SOI substrate. In this module, the measurement result of optical coupling efficiency is -8.09 dB, and the 1-dB alignment tolerances are 25 μm and 26 μm on the horizontal and vertical direction, respectively. Eye diagrams are measured at data rate of 1-Gbps and 2.5-Gbps with the 2^15-1 PRBS pattern and the clearly open eyes are demonstrated.

Polymer based electro-optic modulators have shown great potentials in high frequency analog optical links. Existing commercial LiNibO3 Mach-Zehnder modulators have intrinsic drawbacks in linearity to provide high fidelity communication. In this paper, we present the design, fabrication and characterization of a traveling wave directional coupler modulator based on electro-optic polymer, which is able to provide high linearity, high speed, and low optical insertion loss. A silver ground electrode is used to reduce waveguide sidewall roughness due to the scattering of UV light in photolithography process in addition to suppressing the RF loss. A 1x2 multi-mode interference 3dB-splitter, a photobleached refractive index taper and a quasi-vertical taper are used to reduce the optical insertion loss of the device. The symmetric waveguide structure of the MMI-fed directional coupler is intrinsically bias-free, and the modulation is obtained at the 3-dB point regardless of the ambient temperature. By achieving low RF loss, characteristic impedance matching with 50Ω load, and excellent velocity matching between the RF wave and the optical wave, a travelling wave electrode is designed to function up to 62.5GHz. Domain-inversion poling with push-pull configuration is applied using alternating pulses on a 2-section directional-coupler to achieve a spurious free dynamic range of 110dB/Hz^2/3. The 3-dB electrical bandwidth of device is measured to be 10GHz.

In this paper, we present the realization and the characterization of high-bandwidth 80μm-core MMFs. Insertion loss, modal bandwidth and its assessment by Differential Mode Delay (DMD) measurements and macro-bend-loss measurements will be particularly detailed. System performances at 10Gbps and 20Gbps over 10s of meters are investigated using the IEEE Spreadsheet model and a more complete physical.