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Proceedings of SPIE Volume 8067

VLSI Circuits and Systems V
Editor(s): Teresa Riesgo; Eduardo de la Torre-Arnanz
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Volume Details

Volume Number: 8067
Date Published: 3 May 2011
Softcover: 32 papers (334) pages
ISBN: 9780819486561

Table of Contents
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Front Matter: Volume 8067
Author(s): Proceedings of SPIE
Evolutionary hardware design
Author(s): Lukas Sekanina
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3D-design exploration of CNN algorithms
Author(s): Lambert Spaanenburg; Suleyman Malki
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Bio-inspired FPGA architecture for self-calibration of an image compression core based on wavelet transforms in embedded systems
Author(s): Rubén Salvador; Alberto Vidal; Félix Moreno; Teresa Riesgo; Lukáš Sekanina
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Partial reconfiguration of a peripheral in an FPGA-based SoC to analyse performance-area behaviour
Author(s): Andres Cardona; Yi Guo; Carles Ferrer
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Cost and energy efficient reconfigurable embedded platform using Spartan-6 FPGAs
Author(s): A. Otero; M. Llinás; M. L. Lombardo; Jorge Portilla; E. de la Torre; T. Riesgo
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Performance analysis of 802.15.4 wireless standard
Author(s): Emanuele Losavio; Simone Orcioni; Massimo Conti
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RFID-based wake-up system for wireless sensor networks
Author(s): A. Sanchez; J. Aguilar; S. Blanc; J. J. Serrano
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Wireless videosurveillace over 802.15.4
Author(s): Massimo Conti; Manuele Telari; Simone Orcioni
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Simulation of impulse response for indoor wireless optical channels using 3D CAD models
Author(s): S. Rodríguez; B. R. Mendoza; G. Miranda; C. Segura; R. Pérez Jiménez
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A 55 μW programmable gain amplifier with constant bandwidth for a direct conversion receiver
Author(s): Jens Masuch; Manuel Delgado-Restituto
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Multi-user THSS system for indoor wireless optical communications with angle-diversity detection
Author(s): S. Rodríguez; B. R. Mendoza; J. R. Álvarez; O. González; A. Ayala
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Heterogeneous transmission and parallel computing platform (HTPCP) for remote sensing applications
Author(s): Yi Guo; Antonio Rius; Serni Ribò; Carles Ferrer
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Low-power, high-speed FFT processor for MB-OFDM UWB application
Author(s): Guixuan Liang; Danping He; Eduardo de la Torre; Teresa Riesgo
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SystemC modelling of wireless communication channel
Author(s): Massimo Conti; Simone Orcioni
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Hardware-software-co-design of parallel and distributed systems using a behavioural programming and multi-process model with high-level synthesis
Author(s): Stefan Bosse
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Dynamically reconfigurable router for NoC congestion reduction
Author(s): Juan E. Rosales; Félix Tobajas; Valentín de Armas; José A. Mori; Roberto Sarmiento
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NoC emulation framework based on Arteris NoC solution for multiprocessor system-on-chip
Author(s): José A. Mori; Félix Tobajas; Valentín de Armas; Roberto Sarmiento
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Performance analysis of the scalable video coding (SVC) extension of H.264/AVC for constrained scenarios
Author(s): N. Suarez; Gustavo M. Callico; Sebastian Lopez; Jose Lopez; Roberto Sarmiento
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Scalable 2D architecture for H.264 SVC deblocking filter with reconfiguration capabilities for on-demand adaptation
Author(s): T. Cervero; A. Otero; E. de la Torre; S. López; G. M. Callicó; T. Riesgo; R. Sarmiento
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Closing the gap between software and hardware super-resolution image reconstruction: provision of high-quality output
Author(s): Tomasz Szydzik; Gustavo M. Callico; Antonio Nunez
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Area-delay trade-offs of texture decompressors for a graphics processing unit
Author(s): Emilio Novoa Súñer; Pablo Ituero; Marisa López-Vallejo
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Evaluation of elementary functions without range reduction
Author(s): Filipe A. Meireles; António J. Araújo
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Challenges facing academic research in commercializing event-detector implantable devices for an in-vivo biomedical subcutaneous device for biomedical analysis
Author(s): E. Juanola-Feliu; J. Colomer-Farrarons; P. Miribel-Català; J. Samitier; J. Valls-Pasola
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Discrete to full custom ASIC solutions for bioelectronic applications
Author(s): J. Punter-Villagrasa; J. Colomer-Farrarons; P. Miribel-Català; M. Puig-Vidal; J. Samitier
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VLSI design of low-leakage single-ended 6T SRAM cell
Author(s): S. Solanki; F. Frustaci; P. Corsonello
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Evaluation of MOBILE-based gate-level pipelining augmenting CMOS with RTDs
Author(s): Juan Nuñez; María J. Avedillo; José M. Quintana
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Effect of separation and depth of N+ diffusions in the quality factor and tuning range of PN varactors
Author(s): M. Marrero-Martín; T. Szydzik; J. García; B. González; A. Hernández
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Automatic vector generation guided by a functional metric
Author(s): I. Ugarte; P. Sanchez
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Energy consumption estimation of an OMAP-based Android operating system
Author(s): Gabriel González; Eduardo Juárez; Juan José Castro; César Sanz
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SCA security verification on wireless sensor network node
Author(s): Wei He; Carlos Pizarro; Eduardo de la Torre; Jorge Portilla; Teresa Riesgo
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Self-repairing SRAM architecture to mitigate the inter-die process variations at 65nm technology
Author(s): Sumit Kansal; Marco Lanuzza; Pasquale Corsonello
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Analytical modeling of glitch propagation in nanometer ICs
Author(s): Xavier Gili; Salvador Barceló; Sebastià A. Bota; Jaume Segura
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