The development of MEMS has initiated the birth of various types of microfabrication processes. These processes in turn serve as a platform for the invention of newer improve3d processes with increasingly higher fabrication resolution. This paper reports on an investigative study on the growth characteristics of nickel micro-columns grown by localized electrochemical deposition - a new truly 3D micro-rapid prototyping and direct-fabrication process capable of producing extremely high aspect ratio microstructures. Nickel columns were electrochemically formed on copper cathodes form a nickel sulfamate plating solution using a non-soluble microelectrode as the anode. Initial experiments showed that zero, partial or complete growths of the columns were revealed, depending on the vertical traverse speed of the microelectrode away form the horizontal copper surface - the preferred traverse speed profile being a decreasing quadratic function that starts form a low traverse speed value followed by a constant function at a higher speed value with respect to time. Further work conducted based on this finding achieve da constant growth rate with an analog closed-loop feedback control of the process, which produced columns with more even dimensions. Understanding of the growth phenomena will allow increases in the rate of deposition and better dimensional control of 3D micro- components grown via localized electrochemical deposition.

MEMS fabrication on large area substrates is promising for novel system concepts, but processes based on crystalline silicon cannot be used. Polymeric materials such as the thick photoresist SU-8 are more appropriate for this purpose because their processing can be scaled to large areas. An x- ray image sensor array based on amorphous silicon on glass substrates was taken as an examples to apply the SU-8 microfabrication technique. We anticipate an improved performance of the imager. The resolution of the x-ray imager is expected to increase by patterning the x-ray conversion screen into cells, which match the sensor pixels of the imager, and SU-8 defines these cells. Furthermore, SU-8 functions as a thick interlayer dielectric with decrease the electronic noise and result in a higher sensitivity of the imager. The fabrication process with SU-8 will be described and challenging issues, especially when considering large area substrates, will be discussed.

This paper presents a new technique to investigate deep microfeatures, and an alternative process to produce micro components. Micro-EDM and focused ion beam micromachining were combined to directly fabricate the mold features. The first process was to remove the bulk material while the later was to produce intricate details and improve the surface integrity. To investigate the effects of ion beam parameters on the mold material, nickel beryllium blocks were first ground, polished then mechanically clamped together. A focused ion beam using Ga⁺ ions was used to produce deep microfeatures at the block interfaces, after which the blocks were separated and the in-situ cross sections were examined. The parameters used were varied in the ranges of 30-50 kV accelerating voltage, 2-150 nC/micrometers ² dose, and 5-7000 pA beam current by either dry sputtering or gas-assisted etching. LIGA-competitive features were achieved. Selection of Ni-Be was made sine its mechanical properties were superior to those of pure nickel used in the LIGA process. This ensured a longer mold life when one repeatedly injecting a hot/abrasive polymer to the mold cavity to fabricate 3D micro components in production. Feature obtained with Ni-Be had surface finish approximately 10 nm, accuracy < micrometers , and aspect ratio > 10. Preliminary work showed the success of this technique with micro molded plastics components.

Furl injector nozzles fabricate with micrometer-scale swirler channels are being fabricated using a combination of micro-fabrication and precision machining. Arrays of fuel injector nozzles are an integral component of the Trapped- Vortex (TV) gas turbine combustor for use in advanced aircraft engines. The principle of TV is to improve flame stabilization through interaction between the main and secondary combustion processes. The fabrication of an array of fuel injectors requires nickel microstructures to be electro deposited on both sides of a nickel substrate in order to segregate the inlet air and fuel flows. The microstructures assist in the atomization of the fuel and induce swirl in the fluids. For each injector, a micrometer- scale cone drilled through the plate facilitates mixing of swirling fuel and air. The mixture is then injected into the secondary combustion chamber with a low-pressure air supply, which is required in order to obtain stoichiometric conditions. The prototype fuel injectors are composed of four individual plates. Two plates seal the air and fuel channels. Another plate contains the micro fabricated swirlers. The fourth plate is used to define the low- pressure air reservoir. The plates were mechanically fastened together using alignment pins for accurate plate positioning. Precision machining was used to position and drill the holes required for alignment, fluid flow, and connectors.

The development of exposed PMMA resist for the LIGA process is very difficult and time-consuming when the resist thickness is large and feature aspect ratios exceed about four. This is due mainly to limitations on the development rate imposed by the diffusive transport of PMMA fragments away form the dissolution surface. Development rates under these conditions can be enhanced significantly by high- frequency acoustic agitation. To study this enhancement, analytical solutions describing the periodic flow field are used to evaluate the time-mean Reynolds stresses that drive streaming fluid motion. The resulting steady flow and transport rates within a feature are then computed by solving the Navier Stokes and species transport equations. For typical acoustic frequencies and power levels of 1 MHz and 6 w/cm² the streaming flow within the feature is torroidal, with inflow along the feature walls at maximum speeds approaching 1 mm/min, coupled with a slower outflow along the feature center. The computed increase in transport, relative to diffusion, is typically on the order of 4 to 6 for feature aspect ratios ranging from 3 to 10 and for polymer fragment diffusivity on the order of 10^-11 m²/s, provided that the feature width is greater than about 10 microns. In smaller features, the streaming speed may be suppressed by overlapping viscous boundary layers on opposing feature walls. Higher frequencies help reduce the boundary layer thickness but may lead to less efficient multi-cellular flow patterns when the acoustic wavelength is less than the feature depth.

The SU-8 series is a negative, epoxy-type, near-UV photoresist. It has good light sensitivity and can be structured to more than 2 mm in thickness by UV exposure. It is very suitable for the application in MEMS, UV-LIGA, ultra-film. Fast prototyped from the SU-8 microstructure is a very simple way to manufacture high aspect ratio micromechanical components. The cost of this process is much lower than that of the LIGA process. We adopted electroplating method to prototype SU-8. So metallic film needed to be sputtered on the surface of the silicon wafer. IN order to study the adhesive strength between different metallic films and the SU-8, we prepared four substrates with Cu, NiFe, Au, and Ti film respectively. We found the Ti film has the strongest adhesive strength with the resist. When the film is FeNi, we should decrease the exposure duration to obtain good adhesive strength, due to the strong refection of the film.

Feature scale pattern dependencies and chip and wafer level loading effects complicate the use of deep silicon etching in MEMS applications. They have major effect on uniformity and etch rate on the wafer scale and on a feature scale. The aim of this study was to find the limitations that these phenomenon set on deep silicon etching. Wafer scale, chip scale and feature scale structures were etched in pulsed ICP. Etched depths were 10-500 micrometers , and aspect ratios up to 20:1. Strong dependence of etch rate on loading was observed. On the wafer scale average etch rate was greatly reduced, from 5.4 micrometers /min to 1.7 micrometers /min. At same time uniformity deteriorated from excellent 2 percent to 35 percent which is too high value to practical applications. Chip pattern density did not affect etch rate on an isolated small chips but for 10 by 10 mm² chip 10 percent etch rate reduction was seen at high chip scale load. In this case wafer scale etchable area was 6 percent. We show that feature scale and wafer scale pattern dependencies in ICP etching are strongly coupled.

Silicon-on-Insulator (SOI) MEMS devices (1) are rapidly gaining popularity in realizing numerous solutions for MEMS, especially in the optical and inertia application fields. BCO recently developed a DRIE trench etch, utilizing the Bosch process, and refill process for high voltage dielectric isolation integrated circuits on thick SOI substrates. In this paper we present our most recently developed DRIE processes for MEMS and MOEMS devices. These advanced etch techniques are initially described and their integration with silicon bonding demonstrated. This has enabled process flows that are currently being utilized to develop optical router and filter products for fiber optics telecommunications and high precision accelerometers.

A new dry etch process that is base don Atmospheric Downstream Plasma (ADP) technology has many applications for MEMS manufacturing. The atmospheric-pressure thermal plasma is created by a DC discharge through a stream of inert gas flowing between electrodes in the process chamber. The reactant gas stream flows through the plasma region, where it is decomposed into constituent monatomic gas atoms by the high temperature of the plasma. The chemical reaction of silicon with electrically neutral activated fluorine gas results in isotropic silicon removal with etch rates significantly higher than in vacuum plasmas. The results are deep ADP silicon etching using aluminum mask layers with holes ranging in size from 20 to 600 micrometers are presented. Evaluation parameters include etch rate, wafer temperature, hole depth and width, etch profile, and microloading effects. Mechanism and models os isotropic dep ADP silicon etching are discussed. As a result, design rules for masks used in bulk silicon etching using ADP are proposed.

A fabrication process for laterally moving single crystal silicon microstructures on SOI substrates is presented. Due to an ADRIE process high aspect ratio structures are realized. The underlying silicon dioxide layer of the SOI substrate serves as sacrificial layer. A HF vapor etching system is used for the sacrificial layer etching to avoid sticking effects of the structures. For the fabrication of an acceleration threshold switch a metallized contact area is necessary. The switching contact is realized using a sidewall metalization of the laterally moving structures. The sensor structure is that of a spring mass system. To avoid uncontrollable switchings of the device, an overcritical damping of the sensor structure is needed. The high aspect ratio of the structures makes these high damping coefficients possible. The dynamic behavior of the device is achieved by squeeze-film damping of the high aspect ratio structures. Using optical measurement equipment for the device characterization, overcritical damping coefficients can be verified for the fabricated structures. The mechanical properties and the dynamic behavior of the structures are ideal for the construction of acceleration threshold switches for automotive applications.

In this work the etching of different Si-oxide, Si-nitride and metal layers in HF:H₂O 24.5:75.5, BHF:glycerol 2:1 and vapor HF is studied and compared. The vapor HF etching is done in a commercially available system for wafer cleaning, that was adapted according to custom specifications to enable stiction-free surface micro- machining. The etch rates as a function of etching method, time and temperature are determined. Moreover, the influence of internal and external parameters on the HF vapor etching process are analyzed before choosing the standard HF vapor etch technique used for comparing the etching behavior of the different films.

An investigation on the influence of etchant concentration, dissolving silicon content and additives during silicon anisotropic etching in TMAH has been carried out. Based on the Taguchi method, the etch rates of Si, Al, and SiO₂ were measured via under-etch experiments using the wagon- wheel mask pattern. The improvement on the surface quality was observed by agitating solution under ultrasonic vibration in TMAH solutions with additives. Furthermore, a new approach is developed to reduce wet etching time and to control etched gap depth between the released micro membrane and the silicon substrate. This method employs a polysilicon or an amorphous silicon thin layer embedded between the micro membrane and silicon substrate as a sacrificial layer, then this layer would be fast iso tropically etched away by TMAH solution.

AlN films were deposited on Si(100), and Al/SiO₂/Si substrates by reactive Direct Current (DC) magnetron sputtering of an Al target, under different conditions of substrate temperature, pressure, N₂/N₂ + Ar ratio. The film properties were investigated by X-ray Diffraction, scanning electron microscopy and atomic force microscopy. Deposition rates in the range of 1.2 to 1.8 micrometers /h were obtained, the film grain size was around 40nm. To fabricate test structures, wet chemical etching was developed to etch AlN with a good selectivity respect to Al and Si. Visual aspect and surface roughness show that the maximum temperature must be less than 300 degrees C. X-ray diffraction together with dielectric constant measurement show that films are better oriented on Si(100) than on Al/Si(100).

In silicon surface micromachining, the HF GPE process was verified as a very effective method for the dry release of microstructures. The developed GPE system with anhydrous HF gas and 2-propanol vapor was characterized and its selective etching properties were discussed. The polysilicon membrane was used as a structural layer and LTO and PECVD oxide as a sacrificial layer. We successfully fabricated the surface micromachined microstructures of a thermally driven micropump with no virtually process-induced stiction and no residues after the GPE of sacrificial oxides on polysilicon substrates.

Main interests for MEMS devices are to reduce thermal, dielectric and magnetic loss in active areas due to a substrate and an air medium. For this purpose, deep vacuum cavity structures with planarized stacked membranes were fabricated by the DECTOR process based on silicon surface micromachining. We discuss details of the developed process, especially the effects of a Si trench geometry, post- annealing of the poly-Si layer and HF release conditions on completion of the vacuum structure. To identify validity of the proposed microstructures, thermal microflow sensors having an n⁺-doped heater and two n⁺- /p⁺-doped thermopiles with poly-Si lines were implemented on the various cavity structures of 100 by 100 by 6.2 micrometers ³ using additional CMOS batch processing. The heating efficiency of the sensor on the vacuum cavity is increased by a factor of 5.8 and 1.7 compared to the structures with residual oxides and the air cavity, respectively. It is also found that the sensitivity using the downstream thermopile of 2.5 M(Omega) , 1.53 by 10^-1 mV/(m/s)/mW under 10 mW input power, is about ten and three times higher than corresponding values with residual oxides and the air cavity. Therefore, the configuration employing the deep vacuum cavity structure has advantages of low power consumption and the high sensitivity. These results support versatile MEMS applications.

Surface micromachining is an established micro technology. The process is only limited by sacrificial layer thickness and sometimes a disturbing surface topology. This paper describes an innovative surface micromachining technology. Standard surface micromachining allows layer thickness of a few micrometer. Using porous silicon as sacrificial layer, it is possible to create any layer thickness up to 100 micrometers . Thick porous silicon sacrificial layers are used to combine the advantages of standard surface micromachining with the advantages of bulk micromachining. The problems resulting form surface topology are eliminated by using ion implanted masks. Based on different porous silicon formation mechanism for - and p-type silicon, it is possible to use n- implanted layers as masking material during the anodization of p-type silicon, resulting in a planar surface. For this masking technology, no additional masking layers are required. For free standing membrane generation it is possible to deposit e.g. a PECVD-layer on top of the porous silicon layer. If required, e.g. to protect free standing structures during following process steps from mechanical failures, it is possible to remove sacrificial layers with diluted alkaline solution in a final process step after dicing. A complete process flow has been developed for thick porous silicon layers up to 100 micrometers . The use of this sacrificial layer technology for thermally isolate gas sensor membrane fabrication and the detailed process parameters will be presented.

This paper presents a laser based machining system, especially designed for the production of micro prototypes. The principle work concept of the machine is similar to conventional rapid prototyping (RP) techniques. According to slices of a 3D CAD data file, the part is created layer by layer from the bottom up to the top. However, an optimized design will extend its application to the production of prototypes in the range of 8 mm³ to 125 cm³ but with a resolution of 20 micrometers in all directions. Different to other existent machines is the modular construction, which allows the use of different materials and laser sources with little effort. Thus, stereolithography and selective laser sintering processes can be performed on the same machine. The machining system consist of 5 modules, machine frame, housing, optic, process and software, all designed to meet the requirements defined by a questionnaire among industrial RP job-shops. Pre-investigation have confirmed the resolution in x, y direction.

The industrial use of SOI substrates is quickly spreading. For microelectronics applications, this material brings new functionality such as radiation-hard, high voltage or low voltage and low consumption integrated circuits. Industrial wafers are now commercially available and new technologies, such as Smart Cut from SOITEC company, will provide low price in high volume production. SOI brings also very important features in MEMS. TRONICS Microsystems, a manufacturer of customers specific MEMS on Surface and bulk micromachining produces MEMS components, such as high temperature and low noise piezo resistive pressure sensor or miniature high performances capacitive pressure and acceleration sensors, using SOI wafers. One of the process used: the Epi-SOI surface micromachining has become a new generic technology that will provide various industrial products in the near future.

An approach to MEMS Computer Aided Design tools has been to make use of Integrated Circuits CAD suites with specific enhancements for MEMS designs. Extending the IC Design Rule Checkers to non-manhattan shapes is one of these needed enhancements. IF anecdotally used in IC designs, non- manhattan shapes are intensively used in today state of the art MEMS products. High performance gyroscopes and yaw rate sensor made in surface micromachining processes feature spiral springs and torsional combdrives made of toroidal fingers. Applying classical DRCs to these layouts generate thousands of false errors. The errors are false because they do not affect the manufacturability of the device. But because of their number, they prevent the designers from detecting real errors in their layout. Most false errors are generated by rounding floating point vertices' coordinates, translating different data types and snapping points to a grid. This paper presents a new methodology to eliminate false errors generated by the DRC of non-manhattan shapes. This methodology includes adding a tolerance factor to Microsystem design rules with respect to the geometric properties of non-manhattan shapes and the manufacturing grid parameters, closely control the vertices coordinates when automatically generating the non manhattan shapes and control the snapping on the grid. This methodology has been implemented in MEMSCAP Microsystem engineering kits and has been validated for three foundries design rules: BOSCH, SensoNor, and AMS.

The MEMS Exchange is a DARPA funded research program to provide the domestic MEMS community with an interface between MEMS designers and microfabrication facilities to allows designer to develop and exercise custom process sequences. These process sequences may cross the boundaries separating fabrication facilities in order to maximize process and design freedom. Information transfer within the MEMS-Exchange fabrication network takes place almost exclusively via the Internet, so process information and metrology data is available to customers near real time. In order for the designers to utilize such a facility, basic operational information about the execution of a process sequence, such as price, turn-around time and quality must be available. Time stamps, process metrology and cost data are all captured as part of routine MEMS Exchange operation. Special operations instrumentation has also been implemented in a software tool called the Process Event Logger to measure process requirements in terms of machine and staff time, and to determine the costs of delayed information, materials and equipment availability. The initial data is presented which is intended to be used to develop a model for MEMS prototyping fabrication to determine expected cost, turn-around time and quality for custom process sequences.

Commercial CAD tools for MEMS have significantly contributed to the growth that the MEMS industry has experienced over the past two years by reducing development cycles and enabling the more rapid release of mature MEMS products. Unfortunately, the CAD for MEMS industry has focused primarily on device performance with a concentration on testing and optimizing the performance in a workstation environment. Device manufacturability issues have been neglected and considered secondary design criteria.

The microsystems market for MST is predicted to grow to 38 billion dollars by the year 2002, with systems containing these components generating even higher revenues and growth. One of the barriers to successful exploitation of this technology has been the lack of access to industrial foundries capable of producing certified microsystems devices in commercial quantities. To overcome this problem, the European Commission has started the EUROPRACTICE program in 1996 with the installation of manufacturing clusters and demonstration activities to provide access to microsystems foundry services for European small and medium sized companies (SMEs). Since 1996, there has been a shift form providing 'broad technology offers' and 'raising awareness fro microsystem capabilities' to 'direct support of design needs' and 'focused services' which allow SMEs to use even complex microsystems technologies to implement their products, The third phase of EUROPRACTICE has just been launched, and contains 5 Manufacturing Clusters, 12 Designs Houses, and 7 Competence Centers, each working in different application/technology areas. The EUROPRACTICE program will be presented together with a detail description of the capabilities of the participants and information on how to access their services.

Looking at today's production of microelectronics, the laser is a commonly used tool for many purposes. Especially laser micro welding of electronic contacts, the application discussed here, gains more and more importance in industrial production. The reasons are its high flexibility, the absence of a third joining partner like solder, the high temperature resistance and finally its high miniaturization potential.

The application of precision grinding for silicon diaphragm formation is investigated. The test structures involved 6 mm diameter diaphragms with thickness in the range 25 micrometers - 150 micrometers . When grinding is performed without supporting the diaphragm, buckling occurs due to non-uniform removal of the silicon material over the diaphragm region. The magnitude of buckling depends on the final thickness of the diaphragm. Results obtained from using FEM analysis to determine deterioration in performance of the diaphragm performance due to buckling are presented. These results show a 10 percent reduction in performance for a 75 micrometers thick diaphragm with a buckling amplitude of 30 micrometers , but negligible reduction if the buckling is reduced to < 10 micrometers . It is shown that the use of a porous silicon support can significantly reduce the amount of buckling, by a factor of 4 in the case of 75 micrometers thick diaphragms. The use of SOI technology can also suppress or eliminate the buckling although this may be a less economical process.

In this paper, a technology and a machine tool is presented, which can be implemented in the production of Liquid Crystal Displays (LCDs), leading to a higher flexibility and reduced manufacturing costs. The developed technology focuses on the generation of transfer points by selective removal of polyimide on an Indium Tin Oxide layer with UV-laser radiation, thus replacing the conventional stamping method with cliches. With the combination of xy-stages and galvanometer scanner beam deflection, panels with dimensions of up to 400 by 500 mm² can be processed. On test panels, the required 2000 transfer points, distribute on the entire panel, can be processed in step and scan mode in about 30 s with an accuracy of better than 20 micrometers . The yield of the new technology in terms of working displays is comparable to the current technology. Besides LCD production, the developed machine tool has a high potential in the field of micro and precision engineering on large scale panels. The machine is highly versatile and can be used to perform a wide variety of processes in organic and inorganic materials for volume production as well as for research.

An alternative non-destructive analysis method using laser scanning microscopy (LSM) was used to study etch release distances in MEMS pressure sensor. The LSM method eliminates samples preparation and is easy to implement in a MEMS manufacturing environment. In this study, various diaphragm structures were etched using a highly concentrated HF based solution. Experimental etch data were obtained for both SiO₂ and PSG films under these various structures. Both the height and the width of the sacrificial layer port/channel had a significant effect on etch rate for both films. As expected, a non-linear etch rate was obtained for both SiO₂ and PSG films. Since the HF concentration changes over time in a manufacturing bath process, careful selection of processing time is required in order to fully release MEMS structures. Future theoretical modeling with the assistance of experimental data obtained in this study is being pursued to strengthen past work done by Eaton et al, Monk et al, and Liu et al.

A technique for repairing stiction-failed, surface- micromachined polycrystalline silicon cantilevers using pulsed lasers has been developed and demonstrated. Microcantilevers, which adhered to the substrate during the chemical sacrificial layer etch and drying processes, were irradiated with either a 800 nm Ti:sapphire or a 1064 nm Nd:YAG laser and successfully freed from the substrate. The feasibility of the laser process was first shown with a Ti:sapphire laser system irradiating undoped, polycrystalline silicon microcantilevers. The repair yields for the Nd:YAG laser process were up to 100 percent for 10 micrometers wide beams as long as 1 mm for laser fluences of 70 mJ/cm². The sample age and initial release quality affect the laser process yield, with newer samples and those with high quality initial releases having the highest number of microcantilevers being repaired.

We have investigated different techniques to deposit 1 micrometers to 2 micrometers thick aluminium onto sidewalls of trenches etched into silicon. This process is required for the fabrication of thermally excited vertical bimorph actuators. First, aluminium is deposited covering both horizontal surfaces and sidewalls. Then an etch-step removes the aluminium from the horizontal surfaces, retaining only aluminium spacers on the sidewalls. Sputtering of aluminium and a subsequent anisotropic dry-etch yields spacers of a thickness less than 0.5 microns having a rough surface. Evaporation of aluminium at a shallow angle between the wafer and the aluminium source allows controlling the thickness of the deposits on the sidewalls compared to those on the horizontal surfaces. Thus, the dry-etch time can be reduced resulting in aluminium spacers up to 2 microns thick and of improved surface quality. If the deposit on the sidewall is thicker than on the horizontal surfaces, isotropic wet-etching can be used to remove the aluminium on the horizontal surfaces, where as on the sidewalls it is only thinned by about the thickness of the aluminium on the horizontal surfaces. Spacers of up to 2.5 microns thickness with good surface quality have been achieved.

MEMS promise to revolutionize nearly every product category by bringing together silicon-based microelectronics fabrication with silicon micromachining technology, thereby, making possible the realizing of complete systems-on-a-chip.

The effects of impurity doping and heat treatments on the characteristics of thick polysilicon films were studied for development of the structural materials in the MEMS. In this study, 8-15 layers of 6.5-12 micrometers thickness polysilicon films were deposited to have a symmetrical structure using low-pressure chemical vapor deposition with a novel stacking method. We have measured the physical and structural characteristics using micromachined test patterns to verify the minimal stress and stress gradient in the polysilicon layers, according to the film stacking, doping, and thermal treatment methods. The multilayer film revealed the complex orientation composed of (100), (220) and (311) grains after annealing and showe4d a higher doping concentration induced a higher compressive stress of 70 Mpa since phosphorus gave rise to a compressive stress in a polysilicon film. However, the doping method for the most uniform distribution of phosphorus induced the lowest stress gradient among all samples. A polysilicon microresonator with thickness of 6.5 micrometers were manufactured by the symmetrical stacking and optimum doping method in which the dopant concentration was lowered and annealing at 1000 degrees C. The film had a low stress of 7.6 MPa and a low stress gradient of -0.15 MPa/micrometers and revealed good slopes of sidewalls after dry etching. The fabricated test structure for a micro gyroscope showed that the driving resonant frequency and the sensitivity was measured as 9,175 Hz and 5 mV-sec/deg under the condition of a static angular velocity, respectively.

LSI process compatible materials are important in the MEMS field. To add on MEMS fabrication processes after circuit fabrication, it is necessary the process temperature must be kept less than about 350 degrees C. The stress control of the film is also important for actual devices. The individual silicon enriched nitride (SEN) film has been developed, and the film properties have been clarified. The deposition temperature of SEN film is 250 degrees C, and that temperature is enough low to perform deposition process after LSI fabrication. The stress of SEN film is proportional to H₂ gas flow, and it can be controlled from tensile stress of 30 MPa to compressive stress of 360 MPa. It is thought that the SEN film stress depends on the hydrogen content. The deposition rate and buffered HF etching rate also depend on H₂ gas flow. From the RBS analysis, the composition ratio of Si/N is about 2.1. The SEN film is adopted to a condenser microphone. The membrane profile is well controlled by using tensile stressed SEN film. The sensitivity of fabricated microphone increased 0.5 mV/Pa in the half area diaphragm. The noise level is also improved over 12 dB_SPL.

A novel micropump actuated by NiTi/Si diaphragm has been developed. In order to optimize the actuating performance of the micropump, the dynamic actuating properties were studied in different actuating conditions such as different actuating currents, frequencies and duty cycles. The experimental result show that there is a maximum displacement when increasing the actuating current and frequency. The influence of duty cycle on maximum displacement when increasing the actuating current and frequency. The influence of duty cycle on maximum displacement with water flow and without water flow is different. The higher the displacement of the diaphragm is, the larger the flow rate is for a given frequency. The displacement of the pump diaphragm depends not only on the flow rate, but also on the moving frequency. The change of the resistance of NiTi strip indicates that the A - M phase transformation is completed partly during dynamic actuating processes. The maximum flow rate of 360 (mu) l/min was obtained in about 50Hz with 1:1 duty cycle in our experiment.

The micro-EDM silicon machining performances have been stud on a highly doped P-type silicon wafer. To demonstrate and to emphasize the silicon micro-EDM, one kind of stainless steel is machine das a reference material. Both materials are sparked with specific sparking energy in micro-Joule energy range and machining characteristics such as material removal mechanism, cutting rate, relative electrode wear ratio and surface quality are examined and analyzed. The thermally induced microcracks are also examined and analyzed using a an optical and a SEM. It is found that for silicon, the micro-EDM material removal mechanism is not completely similar to conventional metal micro-EDM; besides melting and evaporation there is a significant contribution from thermal spallation, which is a kind of direct mechanical material damage without melting. This paper also present that microcrack generation is not only relate to the sparking energy but also has a close relationship with the silicon crystal lattice. In order to get microcrack free silicon surfaces, the sparking energy should be controlled to low levels, which are much lower than the voltage levels used in metal micro-EDM. All in all, thermal spalling should be reduced as much as possible, to obtain smooth and crack free machined surfaces.

The internal stress in SMA/Si bimorph structure was investigate din this paper. The shape memory alloy (SMA) thin films were sputter-deposited onto single crystal silicon substrates at room temperature and thin annealed at high temperature for crystallization. The internal stresses in SMA films before and after crystallization were measured by substrate-curvature method based on S. Timoshenko's theory. The results show that the internal stress changes from compressive to tensile after film crystallization. The intrinsic stress in the sputter-deposited SMA films is almost relaxed completely during the crystallization annealing and the internal stress in crystallized SMA film is dominated by thermal stress. By varying the sputtering power during deposition, the interface status and intrinsic stress can be controlled and excellent SMA/Si bimorph actuation structure can be obtained.

A rounded-shape sacrificial layer side-wall and multi-layer of IR detecting layer composed of vanadium/vanadium oxide/vanadium were demonstrated for uncooled type micro bolometer fabrication using surface micromachining in technology. The improvement of structural stability of floating micro bolometer structure was achieved by reducing supporting bridge angle up to 50 degrees. Also smoothly rounded bridge allows more efficient residual stress releasing and flatness of floating structure without distortion. The rounded side-wall shape reduces stress concentration of wall edge and was achieved by plasma treatment of sacrificial polyimide. The IR detecting characteristics was also improved by means of fabricating an IR active layer having a high TCR with low resistivity. We deposited multi-layer of vanadium oxide film as an IR detecting layer by a layer-by-layer technology, which fabricates a sandwich typed or multi-layered vanadium and vanadium oxide using conventional r.f. magneton sputtering system. We easily obtained over -2 percent/K of TCR and 1(omega) -cm of resistivity of VO_x films by new deposition technique.

This paper presents the results about glass wet-etching and glass-to-glass bonding research for micro Capillary Electrophoresis and some other bio MEMS applications. Common glass and Pyrex glass had been chosen for the etching experiments with the HF-based series of etchants. Using negative photoresist, Shipley, together with the Au/Cr composite films as the masks, the etching rate of the glass in different concentration etchants had been investigated. Very fast etching rate, approximately 0.8micrometers /min, can be obtained. The mask we developed can stand more than 2 hours HF etching and very good glass surface had been obtained. The experimental results also had shown that there exist a big difference in etching rate between the common and Pyrex glass. Using anodic-like bonding skill, glass-to-glass mates with large area are realized with PECVD amorphous-Si as the intermediate layer. Micro Capillary Electrophoresis system had been developed by this technique and the test is still in progress. All these techniques also can be employed bio- MEMS chip in the future.

We introduce a new low temperature bonding technology to assemble two microstructured glass substrates for the realization of micro channels for chemical analysis applications. To realize the micro channels, we introduce, besides the well-known HF-etching technology, two simple alternative methods, namely sawing and micro-powder blasting. After proper cleaning of the two glass surfaces, direct bonding is obtained just by exposing the glass stack to a high pressure in the 100-200 degrees C temperature range. At these low temperatures, we obtain bonding strengths as high as 10 MPA, comparable to the best values reported in literature. As a possible mechanisms for this strong bonding, we propose the pressure-induced enhancement of the bonding contact surface.

While package developers struggle to keep pace with the shrinking I/O pitch of the latest ICS, another challenge is being added by a new wave of micro-electro-mechanical systems. These devices combine standard IC circuitry with micro-moving silicon structures.

On the contrary of microelectronics where standard packages like e.g. DIP, QFP, BGA, SOIC dominate, microsensor packaging seems to be characterized by custom and application-specific packages. Moreover, in microsensor applications packaging is typically a relevant cost component of the whole system. In this scenario, the main question to solve for a high volume and no product specific company mission is the following: how to design versatile, reliable, low-cost packages for microsensor. In this article the assembly solutions for a low-cost mass production of a rotational accelerometer sensor are shown. From the packaging design point of view, the stress minimization has been the main guideline for any assembly process and material characterization choice. The process and material issues, including numerical simulations, optimization by design and experiment, are discussed in detail. Breakthrough in this project were the wafer to wafer bonding as well as the die singulation, the die to die interconnection and the thermomechanical stress minimization.

An IC-compatible process for pattern transfer in deep wells and cavities for the integration of RF components is presented. After an anisotropic wet etching step used to define the optimum position of the ground plane, structures need to be patterned on the bottom of 250-400 micrometers dep etched grooves, trenches or cavities to realize wafer- through contact holes and metal patterns. Thick positive photoresist such as AZ4562 and ma-P275 are used. Modified resist spinning procedure and soft bake process resulted in a good coverage of the etched cavities, even for the deeper ones. The effect of resist thickness and spinning procedure on coating defect density and resolution loss is investigated and optimum conditions are found. A few examples of structures realized using the process described here are shown to indicate the potential and restrictions of this process.

Presently two porous silicon formation technologies are published: the anodization into an electro chemical cell and stain etch without external current into a hydrofluoric acid/nitride acid solution. For anodization an external current is necessary in order to achieve porous silicon thicknesses up to 100 micrometers . Stain etch is an electroless process, and the porous layer thickness sis limited to a few micrometers. A novel porous silicon formation technique that combines the advantages of thick layer anodization and electroless stain etch will be shown. A current generated by a galvanic element of silicon and a precision metal on the backside of a silicon wafer in a hydrofluoric acid (HF)/hydrogen peroxide (H₂O₂)/ethanol electrolyte is utilized in order to generate porous silicon. In this case the silicon operates as anode and the metal as cathode for current generation. This current is similar to the external current needed for anodization. Beside the standard porous silicon etch solution HF and ethanol to oxidizing agent H₂O₂ is used to support the etch process and to generate a higher etch rate. Etch rate control is given by concentration of etching solution and metalization. Different kinds of metalizations and etching solutions were investigated. This novel technology enables to generate stable porous silicon layers of e.g. 80 micrometers within 10 minutes without an external current. This can be the first efficient way for porous silicon batch processing. Detailed process parameters and characterization will be presented.

Multi-layer structures have been fabricated using Fusion bonding. The paper shows void free layers of between 2 and 100 microns that have been bonded to form multi-layer structures. Silicon layers have been bonded both with and without interfacial oxide layers.

The Institute for Microstructure Technology at Forschungszentrum Karlsruhe has implemented a rigorous quality management system and was certified according to the DIN ISO EN 9001 standard in January 2000.

Polysilicon is the most commonly used film for surface micromachined devices such as accelerometers, gyroscopes, and pressure sensors. In this study, the development of implanted polysilicon film s for surface micromachined devices is reported. These devices were developed for integration with a double level metal sub micrometers CMOS product line. For films with 5-30 k angstrom thickness, and residual stress, sheet resistance, deposition rate, and thickness uniformity were characterized as a function of deposition temperature, silane flow rate, implant dose, and anneal conditions.

Wet etch processes are important for the production of MEMS devices. Sacrificial oxides are often used to help define polysilicon structures, and these films are often etched using solutions containing hydrofluoric acid. One important consideration is the use of an etch stop which is resistant to HF. In this study, a silicon-rich silicon nitride film was developed for this purpose. Process parameters such as DCS:NH₃ ratio, pressure and temperature have ben varied in order to create a film that has a low wet etch rate, good cross-wafer and cross-load uniformity, and low conductivity for good isolation resistance. The film is also designed to have a low tensile stress, which should minimize etch rate and also minimize wafer curvature, which is beneficial for subsequent photo steps. Finally, film characterization using the index of refraction as the primary process control is discussed.

CVD diamond film is an attractive potential material for microelectronics and MEMS application, but patterning of diamond is one of the main difficulties hindering diamond electronics. In this paper, we studied the RIE process for precise patterning of diamond films. Ni/Cr, Cu/Cu or NiTi films were used as maskants, oxygen as reactive gas. The etching results showed that the NiTi film has high etching selectivity when used as mask for diamond etching and its is very convenient to be patterned by the special developed chemical etchant. Using O₂ as main etching gas, the RIE can etch the diamond film effectively. The process parameters such as RF power, vacuum pressure have marked influence on the etching rate and the patterning of diamond film has been defined. Combined with sacrifice layer process and electroplating through mask technique, diamond micro hinge has been fabricated on silicon wafer.

A high precision alignment of mask pattern to crystal orientation is essential for fabricating most micro- mechanical devices. With an accurate alignment on a silicon wafer, the time for obtaining a smoothly etched sidewall surface can be reduced and the undercut phenomenon can also be minimized during the anisotropic etching process. In this article, a series of circles are made as an aligning pattern. These circles are evenly distributed at each 0.1 degrees along the same arc of radius 43mm. A wafer is etched in the TMAH solvent for a certain period of time, and the final etched pattern is served as an alignment mark. The present method relies upon the fact that when a (100) silicon wafer is etched for a sufficiently long period of time in an orientation-dependent etchant through a circular window, the etched out portion will form a cavity of pyramidal shape with its surfaces along the (110) directions because the etching process is almost stopped at the (111) planes. However, this pyramidal cavity will continue to grow along the (111) direction when the etching process is continued. This is caused by the undercut phenomenon occurred at the contact line of the passivation layer and the Si substrate. Despite of the circular window used on the passivation layer, the top view of the pyramidal cavity caused by undercut on the Si substrate will be a square opening. Through a visual inspection from the top view, one can find that the corners of some neighboring square openings contact to each other but some are not after a sufficient time of etching. The contact proximity at the corners of two neighboring square openings is taken as an accurate rule for the wafer's alignment. Such a pre-aligning pattern allows one to determine the (100) orientation within accuracy of 0.05 degrees.

We present powder blasting as a new technology for the realization of Micro Electro-Mechanical Systems (MEMS). The technique is base don the erosion of a masked substrate by a high velocity powder beam. We study the erosion rate of the process using glass wafers and introduce oblique powder blasting, where we vary the angle of incidence of the powder beam with respect tot the target surface. The oblique impact gives rise to particular side walls effects of micro patterned hole structures. We have applied this microfabrication method for various MEMS applications, like the realization of glass accelerometer beams, biological microsystems for the culture and characterization of living cells and ferrite-based miniaturized transformers for ultra- small power applications.

Residual stresses from deposition of several micron thick polysilicon film on accelerometer wafers caused wafer to warp towards edge of wafer. The average peak to valley difference for wafer flat across wafer is 16 +/- 1 micrometers . The photo layer following the thick polysilicon deposition process is a CD critical layer with 1 micrometers spacing to be resolved. With standard stepper configuration, wafer non- flatness from residual stresses reduced overall depth of focus and made the 1 (mu) spacing in edge dies not resolved, resulting in stiction and yield loss for edge dies. To minimize the effect of wafer non-flatness on across wafer CD control and edge die CD definition at photo, three different focus algorithms as well as two different wafer chuck styles were evaluated on 1X steppers. Results showed that both oblong wafer chuck and two step focus option significantly improved CD definition and resolution of the 1 micrometers spacing in edge dies. Two step focus combined with oblong chuck offered the best CD control edge dies. Edge die yield loss was eliminated for accelerometer wafers ran with oblong chuck and two step focus. Oblong chuck, and two step focus combination have been released to full production at Poly2 layer of accelerometers.

A novel method of manufacturing bulk micromachined components in SOI material with anisotropic wet etching is presented. The SOI material reduces the total chip size compared to standard bulk micromachining since the slopes are shorter. It also adds functionality to the components, such as inherent overload protection and squeezed air-film damping. The method is based on double sided lithography and anisotropic wet etch of the thin device layer of the SOI wafer. The lithography on the back of the buried oxide is carried out either by electro deposition of the photoresist PEPR 2400 or by spraying ma-P 215S. A highly symmetric three-axis accelerometer has successfully been manufactured in a 50 micrometers thick SOI film.

Although the 3D antenna coupled structure type Bolometer has many advantages, the challenge for fabricating 3D antenna coupled structures could not be carried out due to the difficulty of fabrication. The purpose of this paper is to propose the new 3D antenna coupled bolometer structure and to find a possibility of fabricating 3D antenna structure. We propose to use horn antenna because it is well known that the horn antenna has the best efficiency in the upper range of radio frequency. Since lengthening the height of horn when the aperture size of horn is field enhances the efficiency of the horn antenna. The difficulty of fabrication of 3D antenna is on the horn shape fabrication itself. In this study, we focus on the verification of the probability of fabrication a micro horn shape and purpose to use SU-8 to fabricate a high horn shape in this paper. Because the UV is a light, when the lithography process is done, the UV disperse and refracts from the edge of mask patterns. We utilize this property of UV to make a horn shape. At first we experimented to set up a standard process condition. The acquired standard conditions are the data ranged from 10 to 275 micrometers in thickness. Fixing standard condition for the 20 and 100 micrometers thickness except dose, we changed UV dose condition form 84 mJ/cm² to 3000 mJ/cm², and checked the side wall profile of the test pattern structures by SEM. They had sloped side-wall profiles and showed the possibility of fabricating horn shape antenna array using SU-8. Consequently, it seems to be possible to fabricate the horn antenna array coupled with bolometers.

A micromechanical switch, which can be used as a logic gate, is described in this paper. This switch consists of fixed input electrodes, output electrode, VCC/GND pad, and movable electrode suspended by crab-leg flexures. For mechanical switching of an electrical signal, an actuator driven by electrostatic force was used. Provided that a movable electrode is connected to VCC and a low input voltage or ground signal is applied to the fixed input electrodes and the movable electrode. The proposed micromechanical switch was fabricated by surface micromachining technology with 2 micrometers -thick poly-Si and the measured threshold voltage for ON/OFF switching was 23V.

Here we demonstrate two fine optical components fabricated by replica-molding from anisotropically etched Si molds. One component is microcavity in micro-scales and the other is grating computer with a pitch of 500 nanometer. We investigated the feasibility of two methods for the microfabrication of the SI molds: one method is for making hundreds of micrometer size Si molds by using conventional photolithography and reactive ion etching technique combined with post anisotropical crystalline etching; and the other is for fabrication of micro periodic structure in optical waveguide was presented. Periodicities in excess of 5000 lines/mm were successfully transferred from silicon mold to polymer layer. The yield, repeatability and efficiency of the original master are very good. This technique can also be used to fabricate other nanometer-scale structures.

An organosiloxane resist, 3D structure polysiloxane, had been developed for use as a high resolution bi-layer resist for high-aspect ratio microfabrication. The resist molecule is structured as a rigid 3D siloxane core surrounded by functional groups. The advantages of such a structure are lower degree of swelling, a high oxygen-reactive ion etching resistance, and a high softening temperature. A 100 nm line- and-space pattern is well-defined after electron beam exposure. The resist can be also used for UV lithography. Sub-half micron UV pattern with aspect-ratio or more than 10 can be delineated with the 3D structure siloxane/novolak bi- layer resist system after high density oxygen plasma etching. The novolak bottom layer is etched at about 1000 nm/min, and the etching selectivity ratio is more than 20. The excellent etching resistance of the 3D siloxane is due to its high silicon content and good film quality. The softening temperature of the 3D siloxane is more than 400, although ladder structure siloxane's softening temperature is 150. This suggests the 3D siloxane resist exhibits high heat resistance due to its rigid structure. Bi-layer resist systems with the 3D siloxane show high resolution with high- aspect ratio, demonstrating its great potential for application in microfabrication process of electronic devices.