Since its introduction almost two years ago, Corning's code 1737 AMLCD substrate glass has received strong market support. Some of this was anticipated as this glass offers several obvious improvements over existing substrates; however, some came unexpectedly as AMLCD manufacturers discovered new attributes offered by this glass. Chief among these anticipated improvements were a higher glass strain point, translating into a substrate with greater thermal stability; a lower density, resulting in lower weight and less gravitational sag; improved chemical durability, allowing more aggressive etching conditions; and a coefficient of thermal expansion more closely matched to silicon, opening up the possibility of chip-on-glass. Some of the unanticipated benefits include greater strength and a natural tendency of the glass to get sodium from silica barriers layers. This paper will review the development of Code 1737 glass, outlining the benefits it brings to the technical, commercial, and manufacturing development of next generation AMLCD's.

Large size high-resolution liquid crystal displays put severe restriction on metal selection for gate lines where very low resistivity is required. Pure aluminum (Al) could be used of hillocking issues could be resolved. In this paper we demonstrated an Al deposition process on glass substrates with ultra low hillock density after photoresist and dielectric processing. Effects of process parameters such as substrate temperature, substrate roughness, base pressure and underlayer thickness on morphology and texture of aluminum are discussed.

Historical background and present status of excimer laser annealing of amorphous silicon for poly-TFTs fabrication are presented. Scanning and single shot systems are compared both on the physical and economical aspects. Process optimization and process control using real time spectroscopic ellipsometry are also presented. Finally, some perspectives in the development of very high power excimer laser are also given.

Low temperature poly-Si TFT mass production plan has been announced recently. However, techniques for depositing poly- Si film and gate SiO₂ film, which provide the possibilities of mass production including that of large- sized substrate and film characteristics to obtain satisfactory TFT characteristics simultaneously, have not yet been established. ULVAC has developed techniques that can be applied to mass production of poly-Si film and gate SiO₂ film and has completed a single-substrate PECVD system called CMD-450 poly based on these techniques. Excellent repeatability of film characteristics and film thickness uniformity. The low-hydrogen concentration PECVD a-Si and TEOS-SiO₂ film mentioned below were obtained by using this system.

Recently, improvement of LCD of TFT toward more large-size and high-density are carried on. And, improvement of yield and operation rate are required for a manufacturing equipment. Ion shower doping technique which is impurity doping for silicon thin film for making source/drain region become attractive. It has unique characters which are different form conventional ion implantation system. Its ion beam is without mass separation technique which is used by conventional ion implanter. And ions are implanted into whole area of glass substrate without beam scanning.This system is able to irradiate ion beam which current density is 20uA/cm$2. Implantation which dose is 1 X 10¹⁶ cm^-2 is finished for about 80s. Next, we discuss new types of ion source for ion shower doping system. It is pointed that temperature rising of substrate is a severe problem for resist process. Conventional system uses typically 5 percent PH₃ gas diluted with hydrogen gas. So, hydrogen ion in ion beam is extra heat source. If we can remove hydrogen ion, substrate temperature decrease. New type ion source can prevent extraction of hydrogen ion from ion source plasma. For preliminary examinations, increased phosphorous ratio in ion beam is up to about 80 percent.

Electro-optical performances of in-plane switching mode active matrix addressed liquid crystal (LC) displays were analyzed by using device simulations. Practical combinations of 2D simulations to analyze precise electric and LC director fields and fast 1D simulations to grasp electro- optical characteristics were systematically utilized. Electrode geometries and tilt angle of the LC molecules at the substrate surface were identified as key points to optimize the electronic performance and optical performance, respectively.

The multi-domain technology of UV light modified method has been further studied for the application to TFT/LCDs. The additional process is only UV light irradiation through the sub-pixel mask onto the polyimide film. The cell design of pre-tilt control and LC alignment optimization has been studied. The pre-tilt angle difference and the lower pre- tilt angle between the upper and the lower glass substrate are the key to apply this technology to TFT/LCD, the value are more than 2 degree and less than 1 degree, respectively. The process dependency of this technology has also been evaluated and proved its application to TFT/LCD cell process. The opto-electrical characteristics will be described including charge retention, transmittance-voltage curve, and driving life issue.

In this paper, we present some unpublished results for the first time, on an anomalous a-Si:H/SiNx interface degradation that is to a first order, independent of increasing temperature stress. This interface degradation produces significant impact on the linear region drain current and the ability to charge the pixel capacitance during the gate access time. This anomalous behavior can only be explained by an electric field coupled two carrier transport mechanism occuring at the two interfaces of the gate dielectric. The experimental and modeling results to be discussed in this paper clearly shows that if metastable defect creation is suspect of being present, then the far majority of the threshold voltage shift observed here is dominated by charge injection and transport in the gate insulator.

A solution to the thin film silicon transistor gate metallization problem in active matrix liquid crystal displays is demonstrated in the form of a self-passivation process for copper. Bottom-level copper (Cu) lines are passivated by a self-aligned chromium oxide encapsulation formed by surface segregation of chromium (Cr) from dilute Cu_1-xCr_x alloys at 400 degrees C. The encapsulation is an efficient barrier for Cu diffusion into the SiN_x gate insulator during the plasma deposition and transistor processing, and solves the problems of oxidation and adhesion to the glass substrate without introducing additional mask steps into the manufacturing process. Gate line resistivities of 4.5 (mu) (Omega) cm are obtained. The performance of self-passivated Cu-gate thin film transistors is comparable to that of transistors with refractory metal gates.

A new technique to determine the intrinsic performance of hydrogenated amorphous silicon thin film transistor (TFT) without any influence from source/drain series resistances is proposed. This technique is based on a-Si:H gated-four- probe (GFP) TFT structure. In this method, two probes within the channel of a conventional inverted-staggered a-Si:H TFT are used to measured the voltage difference. By correlating this voltage difference with the drain-source current induced by applied gate bias, the intrinsic performance of a-Si:H TFT, such as mobility, threshold voltage and field- effect conductance activation energy, can be accurately determined without influence from the source/drain series resistances. The a-Si:H GFP TFT and conventional a-Si:H TFT structures are also analyzed and their properties are compared by using 2D simulation based on finite element method. The influence of series resistances on a-Si:H TFT electrical performance is clearly described from the simulation results.

1997 marked the 10th year since the mass production of TFT- LCD was started. During the intervening years, as TFT-LCD advanced rapidly to become an industry of its own, its market size reached about 4 billion dollars in 1996. In addition, there are opportunities for future growth, and the market is expected to grow to 15 billion dollars by the year 2000. New applications for TFT-LCDs are emerging such as car navigation, personal data assistants and monitor displays. In this paper, through looking back on these 10 years of progress, the technical requirements for future expansion of TFT-LCDs are discussed. The trends of manufacturing, the relationship between the process technology and equipment, and a representative key technical term are shown as its market size expands. Four periods are defined such as 'The Beginning, 1987-90', 'The expansion, 1991-94', 'The Fall, 1995' and 'Today and the near future 1996-99'.

While active matrix liquid crystal displays (AMLCDs) are challenging CRT displays for projection and direct view applications, their overall performance must improve before they can displace the venerable CRT while fending off competition from developing technologies. Amorphous silicon, poly-silicon and reflective panels each have benefits but also trade-offs in performance.Selecting between the panels alone can be difficult as aperture ratios, heat handling, size, cost and other factors must be considered. Compared to CRTs and digital light processing technology, AMLCDs must be judged in the areas of greyscale tracking, black levels, signal transmission, multi-screen edge matching, non- standard signal resizing and color temperature adjustment, to name a few. Through experience and experimentation, electrohome has developed a 'wish list' of performance requirements for AMLCDs. This paper will provide, in its conclusion, recommendations on areas for improvement of AMLCD technology.

In the recent years a major discussion has been unleashed about a new paradigm for personal computing, which is focused on supporting the new 'killer app' of accessing and manipulating multimedia data form the internet. The enormous growth of this activity, and the access to network resources that it provides, has called into question the continuing relevance of placing ever more computation and storage locally in the user's computer. The alternative being put forward is that the user device need only include the processing necessary to support network communications, and related I/O activities involving multimedia data. The personal computer then reduces to an I/O device with ever more of the functionality residing in network servers. The display is one of the most critical components of this device and its requirements will be discussed. One primary motivation for this evolution is that the computer must evolve from being an office and business device that was transplanted into the home, to a 'consumer appliance' which truly meets the computing and communications needs of the typical non-business user. Certainly cost is one of the key elements, but as will be seen there are a number of other characteristics that must be changed and incorporated in order for the home computer to have the acceptance of other consumer devices such as the phone and television. In fact the case is so compelling for this new appliance, it will have significant impact in the business sector as well.

Since the 17th century development of the Magic Lantern projector humanity has been fascinated with the concept of making images that are life size or larger, either for group viewing or for immersion impact. Even though today's modern projectors have performance characteristics that are improving yearly, they still require tradeoffs in design based upon the light source used and the image quality produced by the display device. This paper will review these tradeoffs, the interaction between sub-system component groups and the performance of the final projector. In addition, I have included a discussion on the impact of ambient light on the applicability of front and rear projection systems.

In this work we have investigated the crystallization of PECVD as-deposited amorphous silicon films by excimer laser anneal. A lambda-physik XeCl excimer laser was used to produce thin polysilicon films under a variety of operating conditions. The effect of process parameters, such as laser energy density, substrate temperature and annealing ambient was investigated with respect to the grain size and surface roughness of the crystallized films. It was found that annealing in rough vacuum, at a substrate temperature of 450 degrees C and with an energy density of 270mJ/cm² resulted in films with an average grain size of 0.5micrometers and surface roughness of 6nm. It was shown that by introducing a two-step anneal, the distribution of the grain size could be improved with a small compromise in the average grain size. The annealing ambient was shown to significantly affect the surface roughness of the films, with O₂-rich environments generally promoting the development of roughness. Incorporation of a barrier layer under the annealed film was shown to increase the grain size and, tat the same time, improve the resistance of the substrate to laser-induced roughening.

Doped polysilicon (poly-Si) films with a low resistivity have been successfully obtained at a low temperature using novel processing technology, which was combined with the rapid thermal annealing (RTA) and ion-doping methods. P- doped poly-Si films with a sheet resistance of 3k(Omega) /$DAL were achieved with a process temperature 220 degrees C lower than that of the conventional process which combined the RTA and ion implantation methods. The uniformity of sheet resistance for P-doped poly-Si films prepared by the novel process was better that for the excimer laser annealing. The threshold voltage, subthreshold swing and field effect mobility for n-channel thin film transistors with a lightly doped drain structure using the novel process were 2.0V, 0.3V/dec., and 70cm²/V s, respectively.

Silicon-Germanium (SiGe) is a promising material for polycrystalline thin film transistors (TFTs) for active matrix liquid crystal display applications due to its low thermal budget and temperature requirements. The use of SiGe as the channel material in a TFT allows for faster crystallization and dopant activation at lower temperatures than possible with pure silicon. Thus, a SiGe-based TFT technology has great promise as a high-performance, high throughput, uniform, glass-compatible TFT process. Analysis of the SiGe system is difficult due to its binary nature. This complicates the development of optimization strategies for performance enhancement. The numerous variable sand interactions affecting the SiGe system make a standard factorial characterization impractical. In this paper, we present the results of a reduced multifactorial response surface characterization of the system. The results obtained have been used to define optimization strategies for improving device performance. Tests have shown the strategies to be valid over a wide range of conditions. Using these strategies, n- and p-channel TFTs have been fabricated using a glass-compatible process and they exhibit substantially better performance than previously achieved using a similar thermal budget process. Further optimization using the determined guidelines would enable the development of a manufacturable high-performance poly-SiGe TFT process. Phenomena affecting the SiGe deposition system have also been identified, suggesting bounds on the optimization windows.

Polycrystalline silicon-germanium TFT technology has potential for flat panel display applications because of its reduced thermal budget. Previously, single-crystal SiGe MOSFETs have used a silicon cap or interlayer between the gate oxide and the channel to improve the gate oxide interface and device performance. Here the use of a Si interlayer, ranging from 0 to 100 angstrom in thickness, in poly-SiGe TFTs fabricated by a low-temperature process is investigated. It is found that performance is significantly affected by the presence of the interlayer. The changes are due to the improvement of the SiO₂-SiGe interface and the division of the drain current among the Si interlayer and SiGe film, which have different electrical properties. NMOS mobility peaks at 36 cm²/Vs with a 50 angstrom interlayer, as compared to 22 cm$_2)/Vs without an interlayer and 28 cm²/Vs in a pure Si device. Other NMOS performance parameters improve as the interlayer thickness increase.In contrast, PMOS performance initially improves when the interlayer is introduced, but then declines as the interlayer thickness increases.

Silicides are proposed for display applications in order to reduce the series and contact resistances of TFTs fabricated on thin polysilicon islands which would otherwise limit the on current of these transistors. The use of two likely candidates, nickel and cobalt silicide was investigates in order to determine their suitability for TFT-LCD applications. Cobalt silicide was formed at the boundary of the thermal budget by requiring annealing at 600 degrees C, but the silicide is stable and does not degrade with further anneals as would occur during an implant anneal after silicidation. Nickel silicide is formed at 400 degrees C but its sheet resistance was observed to degrade when subjected to a 600 degree C anneal after the silicidation. This problem was partially over come by depositing enough nickel to completely consume the polysilicon contact area during silicidation, though the nickel silicide was still observed to grow in volume during prolonged post silicidation anneals. Comparisons between the relative abilities of cobalt and nickel silicide to act as silicon dioxide etchant stops have been made, and while cobalt silicide films are destroyed during both dry etching in CF₄ and wet etching in HF, nickel silicide films demonstrated only a slow degradation. Devices with silicides have been made and their results compared to non-silicided counterparts.

Polysilicon thin-film transistors are of great interest for their application in large area microelectronics and especially for their circuit applications. A successful circuit design requires a proper understanding of the electrical characteristics and in the present work some specific aspects related to the presence of high electric fields at the drain end of the channel are presented.

The potential to integrate the scan and data driver circuitry and thereby reduce the cost of active-matrix liquid-crystal displays (AM-LCDs) has been one of the major reasons for pursuing a low-temperature poly-Si thin-film transistor (TFT) technology. Improvements in low-temperature large-area processing technologies have made poly-Si TFT technology compatible with conventional amorphous-Si substrates. We examine the cost of manufacturing poly-Si TFT LCDs for 10-in. SVGA resolution color displays. We present a detailed cost analysis of manufacturing a low-temperature poly-Si TFT LCD with integrated drivers including the operating costs of manufacturing. The cost per display for manufacturing plants running amorphous-Si and poly-Si TFT processes at their minimum efficient scale are compared. A cumulative Poisson yield model is presented which takes into account the additional area and process steps requirements for a poly-Si TFT process with integrated drivers. The overall poly-Si AM-LCD manufacturing cost is lower despite having a higher front-end TFT array manufacturing cost due to the additional complexity of fabricating CMOS drivers as well as the lower TFT yield. Our results indicate that low- temperature poly-Si AM-LCDs with integrated drivers will be cost competitive with a-Si AM-LCDs.

Top-gated poly-Si thin film transistors (TFTs) were fabricated on Corning COde 1737 glass substrates coated with SiO₂ barrier layers of varying thickness. The leakage current, or minimum current in the off state of the transistor, was measured and analyzed to evaluate the influence of barrier layer thickness on the TFT characteristics. Our results indicate that using a thick barrier layer may results in higher TFT leakage currents. Control devices on oxidized silicon have higher leakage currents than TFTs on barrier coated Code 1737 glass. Those on glass substrates show the effect of barrier layer thickness. As the barrier layer thickness increases the leakage current also increase. One possible explanation for this is the nature of the glass substrate. Even a thin SiO₂ layer can suppress diffusion of electrically active impurities from the substrate to the device. However, aluminoborosilicate glasses such as Corning Code 1737 are also known to act as sinks for sodium and other process impurities. Thick barrier layers separate the TFT from the gettering effects of the substrate and limit the removal of impurities from the device region.

It has been reported that single crystal silicon transistors whose gate oxides were grown in N₂O or treated to a post oxidation anneal in N₂O demonstrated better resiliency under electrical stress. However, normal oxidation in single crystal silicon processing to form gate oxides is incompatible with the low temperature processes required for polysilicon TFTs designed for AMLCDs. In this work, we have used our previously reported process for a double layer gate oxidation, the bottom layer being a grown oxide formed in a low temperature, high density oxygen plasma and the top layer being a deposited oxide, to build the first low temperature polysilicon TFTs with a nitrogen passivated oxide/polysilicon interface. Our devices were constructed with the bottom 10 nm layer of gate oxide being grown in either an N₂O or an O₂ plasma, followed by a deposition of 100 nm of SiO₂ by PECVD. The devices were then subjected to prolonged periods of stress at V_ds equals V_gs equals 20 V. While having similar pre-stress device characteristics, the devices made with the oxide grown in the N₂O plasma demonstrated a greater degree of stability than those with an oxide grown in an oxide grown in an O₂ plasma.

Ultrasound treatment (UST) was applied to improve electronic properties of polycrystalline silicon films on glass. A strong decrease of sheet resistance was observed in plasma hydrogenated films at UST temperatures lower than 100 degrees C. An enhanced passivation of grain boundary defects after UST was directly measured by nano-scale contact potential difference with atomic force microscope. These strong UST effects are accompanied by improvement of hydrogenation homogeneity as confirmed by spatially resolved photoluminescence study. We also observed a dramatic increase of intra-red photoluminescence (PL) intensity by a factor of two orders of magnitude after a few minutes of UST at elevated temperatures up to 280 degrees C. IN films obtained by solid-phase crystallization of (alpha) -Si, UST activates a new PL maximum at 0.9eV related to the amorphous fraction of poly-Si films. A new mechanism of ultrasound stimulated hydrogenation of dangling bonds in polycrystalline and amorphous Si films is proposed. UST processing was also applied to plasma hydrogenated poly-Si thin film transistors. We found UST stimulated reduction of a leakage current and shift of a threshold voltage, which can be beneficial for AMLCD applications.