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Proceedings Volume 1144

1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices

Louis J. Messick, Rajendra Singh
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Proceedings Volume 1144

1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices

Louis J. Messick, Rajendra Singh
View the digital version of this volume at SPIE Digital Libarary.

Volume Details

Date Published: 28 November 1989
Contents: 1 Sessions, 75 Papers, 0 Presentations
Conference: First International Conference on Indium Phosphide and Related Material for Advanced Electronic and Optical Devices 1989
Volume Number: 1144

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Table of Contents

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Indium Phosphide - Into The Future
Henry W. Brandhorst
Major industry interest is beginning to be devoted to indium phosphide and its potential applications. Key to these applications are high speed and radiation tolerance; however the high cost of indium phosphide may be an inhibitor to progress. The broad applicability of indium phosphide to many devices will be discussed with an emphasis on photovoltaics. Major attention is devoted to radiation tolerance and means of reducing costs of devices. Some of the approaches applicable to solar cells may also be relevant to other devices. The intent is to display the impact of visionary leadership in the field and to enable new directions and broad applicability of indium phosphide.
Growth Of Low-Dislocation-Density InP Single Crystals By The VCZ Method
M. Tatsumi, T. Kawase, T. Araki, et al.
Low-dislocation-density InP single crystals have been successfully grown under the low axial temperature gradient of dT/dZ = 30°C/cm by the VCZ method, which is an LEC method with phosphorus vapor pressure applied over the liquid encapsulant during growth. The average EPD is about 2,000 cm-2 in the 2-inch diameter crystals doped with Fe or Sn. The slip-free and dislocation-free crystals have been obtained by doping S of 2 x 1018cm-3 at the seed end. The InP crystals have uniform distributions of electrical properties with variations of less than 2%. The photoluminescence measurements of Sn-doped crystal have revealed no deep level due to phosphorus vacancy. The VPE InGaAs layer grown on the S-doped VCZ substrate exhibits few propagated dislocations and a very low leak current.
Recent Developments In Gas Source Molecular Beam Epitaxy
M. B. Panish
Several interesting variations of Molecular Beam Epitaxy (MBE), have been developed out of our need, in optical communications, to grow heterostructures incorporating P containing III-V compounds, most importantly in the GaInAs(P)/InP system. These come under the general heading of Gas Source Molecular Beam Epitaxy (GSMBE), and include two major variations. In the first of these the solid elemental group V sources of conventional (or Elemental Source) MBE are replaced with gaseous sources, usually arsine and phosphine, that are thermally decomposed to produce beams of group V dimers and H2 [1]. We now call this method Hydride Source MBE. In the second variation an additional modification is that the elemental group III sources of ESMBE are replaced with simple alkyl compounds of those group III elements [2]. Since those compounds are relatively volatile, beams containing their molecules can readily be generated and impinged on a heated substrate in the MBE system. We call this variation Metal Organic MBE (MOMBE). HSMBE has been shown to be a very versatile method for the investigation of a variety of heterostructures, while MOMBE appears to provide easier access to very low doping background and is potentially the most easily scalable of all of the III-V epitaxy methods for the growth of GaInAs(P)/InP heterostructures.
Improved MBE Growth Of InGaAs-InAlAs Heterostructures For High-Performance Device Applications
Y. C. Kao, A. C. Seabaugh, H. Y. Liu, et al.
In this paper, we report the improvements in structural quality of the InGaAs-InAlAs heterostructures grown on InP by molecular beam epitaxy (MBE). The effect of heteroepitaxial growth parameters on modulation-doped n-InAlAs/InGaAs-InP structures is examined by Hall measurement. Practical growth conditions have been developed for device fabrication. Low-temperature (4.2 K) magnetotransport measurement and resonant tunneling spectroscopy are used to characterize the modulation-doped structures and resonant tunneling barrier structures, respectively. Both measurements indicate the high quality of the heterostructures. Barrier height effect on resonant tunneling diode structures is discussed. InAlAs-InGaAs heterojunction bipolar transistors (HBTs) and high-electron-mobility transistors (HEMTs) have been successfully fabricated on InP in this work.
Incorporation Of Residual Donor Impurities In High Purity Epitaxial Indium Phosphide
B. Lee, M. H. Kim., M. J. McCollum, et al.
The residual donor impurities in high purity InP samples grown by liquid phase epitaxial, vapor phase epitaxial, metalorganic chemical vapor deposition, and metalorganic molecular beam epitaxial techniques have been studied using high resolution Fourier transform photothermal ionization spectroscopy. Five different donor peaks corresponding to different donor species have been observed in the InP samples. The only species that have been conclusively identified, however, are Si, S, Sn, and Ge. The most common residual donor impurity species in all the samples are Si and S.
Definitive Identification Of The Fe3+/Fe2+ Level In Ga0.47In0.53As Layers
G. Guillot, T. Benyattou, F. Ducroquet, et al.
We give an unambiguous identification of the single acceptor level (Fe3+/Fe2+) related to iron in Ga0.47In0.53As and a coherent description of its electrical and optical properties using photoluminescence, thermal and optical capacitance spectroscopies. Investigated layers are either Fe doped or undoped and grown on semi insulating Fe doped InP or n+ substrates by LPE or MBE methods. The internal photoluminescence transition of Fe2+ (5T2-5E) is detected at 0.35eV in the ternary for the first time. Deep level transient spectroscopy measurements show one deep level at Ec-0.34eV which we identify as being caused by the Fe3+/Fe2+ acceptor level. This is confirmed by the o (hv) spectrum of the photoionization cross-section which shows a very well marked resonance peak at 0.34eV due to the transition to the 5T2, excited state. Finally, we discuss the validity of the internal referred binding energy model to predict the band discontinuity in the InP/GaInAs system using the Fe3+/Fe2+ energy level position in the two materials.
InP Based Ternary And Quaternary Thin Film Structures On Large Areas Grown By LP � Movpe
D. Schmitz, G. Strauch,, H. Jurgensen, et al.
Using low pressure MOVPE and higher linear flow velocities high purity GalnAs/lnP and GalnAsP heterostructures can be prepared. Excellent homogeneity in thickness, composition, and doping on a 2" InP substrate can be realized by this approach for optimized conditions. The low growth rates required for the deposition of very narrow well structures are achieved by selecting reduced pressures of the group III and group V compounds used for deposition. The method yields structures with high electron mobilities of the two dimensional electron gas in the well and narrow PL (i.e. 2.2 meV for 20 nm wells) line widths, which is indicative of low impurity incorporation and abrupt heterojunctions. The observed energy shifts (up to 528 meV) demonstrate the large range of bandgap variation attainable by this method. A study of dopant incorporation shows, that Zn yields steep transitions in InGaAs.
Deep Levels In InP By DLTS and TSCAP: Survey And Recent Data
A. Singh, W. A. Anderson, Y. S. Lee, et al.
Electron and hole traps in the same p-InP:Zn substrate were studied by DLTS and TSCAP methods prior to and after irradiation. Prior to irradiation, the DLTS measurements at a quiescent reverse bias of 3V, indicated the existence of three hole traps, H1 (Ev + 0.56eV), H2 (Ev+0.22eV), H3 (Ev+0.14eV) and one electron trap, E1(Ec-0.40eV). The DLTS spectra at a quiescent forward bias of 0.2V, revealed only one interfacial trap, Hi (Ev+0.25eV) which was different from the trap H2. From the bias dependence of the DLTS-data on the most prominent hole trap, the depth variation of trap parameters in surface barrier devices was established. After electron irradiation of the Yb/p-InP MIS device, the electron trap was annealed and four hole traps were observed. Trap data were also obtained on Au or Pd/oxide/n-InP bulk or MOCVD-epitaxial layers, and n +/p junctions grown by MOCVD. Trap parameters are very sensitive to surface conditions, type of metal, presence of oxide, type of device and semiconductor growth technique.
Lattice Mismatched Heteroepitaxial Growth Of GaAs On InP bY Organometallic Vapor Phase Epitaxy.
U. K. Chakrabarti, W. S. Hobson, V. Swaminathan, et al.
Lattice mismatched heteroepitaxy is currently pursued to broaden the material base for integrated optoelectronic devices. We have grown GaAs on InP using atmospheric pressure organometallic vapor phase epitaxy. Specular mirror-like morphology is obtained when a two step pre-layer growth process is adopted. Best morphology is obtained on off-oriented substrates. The films were found to be stoichiometric as studied by Auger electron spectroscopy having a resolution of 0.1 atomic percent. The film-substrate interface, as examined by cross-sectional transmission electron microscopy, revealed a dislocation density =1.3 x 1010 cm while that near the top surface reduced to 8.4 x 109 cm 2. The =2K photoluminescence spectra of the grown material were found to be dominated by exciton related transitions. Furthermore, we also report the reverse and forward current-voltage characteristics of a Au-GaAs-(e)InP diode structure.
Spatially Resolved Photoluminescence Characterization Of Fe Doped Semi-Insulating lnP
M. Erman, G. Gillardin, J. Le Bris, et al.
We present room and low temperature spatially resolved photoluminescence characterization of 2" Fe doped semi-insulating InP wafers. Quantitative informations upon microscopic and macroscopic distribution of Fe have been obtained and correlated with electrical measurements (resistivity mapping), On a wafer scale, photoluminescence images reveal growth facet and striations, while on microscopic scale, low temperature photoluminescence maps taken at two different wavelengths, the first one corresponding to the band to band transitions, the second one to the band to acceptor transitions, show acceptor impurity precipitates as well as dislocations.
Comparison Of The Growth Of InP And InAs By Atomic Layer Epitaxy
Weon G. Jeong, E. P. Menu, P. D. Dapkus
The growth behavior of InP and InAs by thermal atomic layer epitaxy is described. The epilayers were grown in the range 320°C-370°C where the growth is predominantly controlled by surface reactions. For InAs, the growth rate strongly saturates at a growth temperature of 340°C. The growth rate is a strong function of alkyl exposure time for the same integrated alkyl exposure during the cycle. This dependence on exposure time is proposed to be caused by steric hindrance effects of the initial adsorbates and the low surface reaction rates of the alkyls at these temperatures. For InP, the growth rate shows saturation at 320°C but does not saturate at higher temperatures. To achieve saturation at this temperature, a PH3 exposure of one order of magnitude higher than the AsH3 exposure required for InAs atomic layer epitaxy is needed. Contrary to InAs, the growth rate does not saturate at 340°C. The difference of saturation behavior between InP and InAs is thought to be due to lower surface reactivity of PH3 which leads to the formation of In droplets and a higher decomposition rate of In alkyls on P than on As.
Altering The Composition Of GaInPAs Grown By The Hydride Technique By Introducing HC1 Downstream
K. A. Jones, V. S. Ban, G. H. Olsen, et al.
Thermodynamic calculations show that the In and Ga concentrations in GaInPAs change when HC1 is introduced down stream during growth by the hydride method. This results from HC1 reducing the incorporation of In more than it does for Ga. The effect is larger for the initially lattice matched material containing more Ga and therefore emitting light at longer wavelengths. The group V composition also changes with the As mole fraction increasing in intially lattice matched material containing less As and therefore emitting at shorter wavelengths. These results were qualitatively confirmed by experiment. Thus, in principle, lattice matched GaInPAs superlattices can be grown by periodically injecting HC1 downstream and simultaneously adjusting the PH3 and AsH3 flow rates.
Flow-Rate Modulation Epitaxy Of InP By Metalorganic Chemical Vapor Deposition
W. K. Chen, J. C. Chen, J. F. Chen, et al.
We have used the flow-rate modulation epitaxy technique to grow InP in a modified atomospheric-pressure metalorganic chemical vapor deposition system. We demonstrate the deposition of a monolayer in each growth cycle. The growth is mass-transport-limited at higher substrate temperatures, i.e., 420 to 580°C, and is kinetic-limited with an activation energy of 0.57 eV for lower temperatures. The surface morphology is specular even for InP layers grown as low as 330°C.
Characterization Of InP On Si Grown By MBE
H. Y. Lee, T. E. Crumbaker, M. J. Hafich, et al.
The characterization of large area InP single crystal films grown by gas-source MBE on (100) Si substrates is described. To accomodate the 8% InP-Si lattice mismatch, a strained-layer superlattice of InGaP was used as a buffer layer. The dislocation density in the InP, as determined by TEM, was 108 cm-2 and the x-ray diffraction line width of the (400) InP peak was found to be 435 arc sec in annealed films. InP films of 3-4 pm in thickness exhibited specular morphology, low temperature photoluminescence line widths of 6-17 meV, and room temperature electron mobilities of 1900-2300 cm2/V-s. These initial results indicate that optoelectronic devices utilizing a monolithic InP/Si technology are feasible.
Electron-Hole Scattering And Minority-Electron Transport In In0.53Ga0.47As, InAs, And. InP: The Role Of The Split-Off Band
K. Sadra, C. M. Maziar, B. G. Streetman
We report a Monte-Carlo investigation of Coulomb electron-hole scattering processes involving the split-off band in selected III-V semiconductors in the context of steady-state high-field minority-electron transport. Due to the small value of the relevant hole overlap factors, as well as the relative values of the r-L energy separation and the split-off energy, such processes do not make a significant contribution to the minority electron energy loss rate in In0.53Ga0.47As. In InP, however, the rhrs process accounts for a significant fraction of the total r-electron energy loss to holes.
Growth Of InGaAsP Films In A Multi-Wafer High-Speed Rotating Disk Reactor By MOCVD
Mark McKee, Paul Reinert, Peter E. Norris, et al.
Much of the InGaAsP film growth work has been limited to small, single wafer growths. The purpose of this work was to demonstrate good materials properties, especially uniformity, on a multi-wafer system. InGaAsP materials on (100) InP substrates have been grown in a high speed rotating disk reactor using low pressure Metalorganic Chemical Vapor Deposition (MOCVD). Rotation speeds of 500 to 1500 RPM, growth pressures from 30 to 90 Torr, and trimethylindium and triethylgallium sources were used. On a three, two-inch wafer reactor, thickness uniformity of less than ±2% and lattice mismatch uniformity of less than ±1x10-4 has been repeatably obtained on both InGaAs and InGaAsP (1.2 micron wavelength). The effect of growth pressure and rotation speed on uniformity is discussed with reference to flow dynamical models of the rotating disk reactor. In addition to uniformity, good bulk properties were obtained. High purity InGaAs films with electron mobilities of 95,000cm2/VS at 77K were produced. Room temperature photoluminescence intensity of both InGaAs and InGaAsP films were similar to an LPE standard.
Room-Temperature Photoreflectance Spectra Of Thin-Layer (<200A) InP Doping Superlattices
P. Y. Hsieh, Z. Shi, J. C. Chen, et al.
Room temperature optical modulation spectra of InP doping superlattice with thin layers (20A, 38A and 158A) have been obtained by using the photoreflectance (PR) technique. We have found that Franz-Keldysh oscillations (FKO) dominated the spectrum and is caused by the large built-in electric field in contrast with the previous identification of the subband energy transitions between conduction and valence band in the thicker layer (>200A) of InP doping superlattice. The interpretation of different periods of the oscillations among the three samples has been made and the theoretical calculations of electric field based on nonuniformity of charge distribution and Debye screen effect agree well with the experimental results within the acceptable errors. The PR spectra of thinner layer sample have been found to be more sensitive to the temperature and independent on the power density of the modulating light source. Based on these design parameters, such as thinner,layer thickness, higher doping concentration (ie. 2x10 18cm-3) and high quality material of the InP doping superlattice, the impact of using doping superlattice for optoelectronid device applications will be discussed.
Pumping Requirements And Options For Molecular Beam Epitaxy And Gas Source Molecular Beam Epitaxy/Chemical Beam Epitaxy
M. J. McCollum, M. A. Plano, M. A. Haase, et al.
The current high level of interest in the growth of InP/InGaAsP/InGaAs lattice matched to InP, has influenced many researchers to consider the use of gas sources in growth by MBE. For gas flows greater than a few sccm, pumping speed requirements dictate the use of turbomolecular or diffusion pumps. GaAs samples with higher p-type mobilities than previously reported have been grown with a diffusion pumped molecular beam epitaxial system. This demonstration of the inherent cleanliness of a properly designed diffusion pumping system indicates that a diffusion pump is an excellent inexpensive and reliable choice for growth by molecular beam epitaxy and gas source molecular beam epitaxy/chemical beam epitaxy.
High Quality InP Substrates For Advanced Electronic And Optical Devices
T. I. Ejim, F. Simchock, E. M. Monberg
The vertical gradient freeze technique (VGF) has been used to grow large diameter n-type, p-type and semi-insulating InP crystals. The etch pit density (EPD) of these crystals is independent of the dopant type and crystal size under the growth conditions used in this work. We will discuss the characterization results of Zn, S and Fe doped InP crystals with very low and uniformly distributed defects. The S-doped crystals have been grown at sizes up to 63 mm diameter and 1.7 kg. with a typical EPD of <2000/cm2. This EPD was obtained for S-doped crystals with free carrier concentrations in the range 3x1015-3x1018/cm3. The increase in diameter from 53 mm to 63 mm did not lead to any increase in defects and is attributed to the low axial and radial temperature gradients used in VGF technique. Fe doped semi-insulating InP crystals have been grown with resistivities exceeding 107 ohm/cm from the seed to tail end of the crystal. These crystals have EPD that are also <2000/cm2 from the seed to tail. Using glow discharge mass spectrometry and scanning electron microscopy, it is shown that at iron concentrations >7x1016/cm3 in the solid , precipitates of FeP2 occur in the crystal. Zinc doped InP is becoming increasingly more important for high efficiency, radiation hard solar conversion devices. A series of single crystals have been grown with Zn doping in the range 1-6x1017/cm3. The dislocation levels are two orders of magnitude less than those reported from comparably doped LEC material.
Control Of Insulator-Semiconductor Interfaces Of InP And InGaAs For Surface Passivation And Misfet Fabrication
Hideki Hasegawa
The present status of the understanding and control of InP and InGaAs insulator-semiconductor(I-S) interfaces is discussed for surface passivation and and MISFET fabrication. The electrical and microstructural properties of. I-S interfaces are reviewed, and the existing models concerning the origin of interface states are compared. Then, based on the DIGS model by the author's group, control of I-S interface through introduction of two types of interface control layer(ICL) is discussed. One is an anodic native oxide layer, and the other is an MBE-grown ultrathin pseudomorphic Si layer, both combined with a thick photo-CVD insulator. Both 1CLs lead to significant improvements in Nss, channel mobility and drain current stability.
High Performance Ion Implanted InP Misfets Passivated With An Anodic Oxide'
A. Falcou, G. Post, P. Viktorovitch, et al.
High performance MIS field effect transistors on semi-insulating indium phosphide have been fabricated. The contacts and the channel are doped with silicon implantation. The passivation of the channel surface region is achieved by the growth of a 150 A thick specific anodic oxide, In(P03)3 condensed phosphate. The physico-chemical properties of this oxide, reported in details in a separate contribution to this conference, make this material an excellent candidate for the passivation of InP. The gate dielectric is completed with electron beam evaporated Al203. Depletion mode devices with a 2 micron channel length exhibit reproducible low saturation current drift (less than 4% after 1 hour) and high transconductance (100 mS/mm). They are well suited for integrated opto-electronics.
Surface Passivation And Barrier Height Enhancement Of N-type In0.53Ga0.47As Schottky Barrier Photodiodes
D. H. Lee, Sheng S. Li
Studies of surface passivation and new barrier height enhancement of n-type In0.53Ga0.47As Schottky barrier photodiodes have been carried out in this work. For surface passivation, various dielectric films such as Si02, Si3N4 and polyimide were studied and compared. The results showed that MSM photodiodes passivated with polyimide film yielded the lowest leakage current, whereas the Si02 passivated device had the highest leakage current. A new barrier height enhancement method on n- type In0.53Ga0.47As Schottky diodes was developed by depositing a thin graded superlattice of In0.53Ga0.47As/Ino.52A10.48As (10 periods, 60 Aper period) on n- In0.53Ga0.47As epilayer using MBE technique. Effective barrier heights of 0.71 and 0.60 eV were obtained for Au and Cr Schottky contacts deposited on this graded superlattice, respectively.
Evidence Of A Surface Trap By DLTS Measurements On GalnAs Planar PIN Photodiodes
F. Ducroquet, G. Guillot, J. C. Renaud, et al.
Parameters affecting the photodiode dark leakage current, which is one of the main factors which determines the sensitivity of these devices, have been analysed. A dark current drift phenomenon under fixed reverse bias voltage is sometimes observed in planar PIN GaInAs photodiodes passivated by silicon nitride, and is interpreted as a charge transfer from GaInAs layer to the SiNx film. We have used this surface electrical property evolution with time to show that an electron trap detected from DLTS measurements is mainly localized near the GaInAs surface. This mid-gap trap level is supposed to be induced by the passivation process.
InP/Low-Temperature-Deposited SiO2 Interface
P. D. Gardner, S. Y. Narayan
This paper describes the characteristics of the InP/low-temperature-deposited SiO2 MIS system, with emphasis on C-V hysteresis and drain current drift in InP MISFETs. The SiO2 was deposited using a low-pressure (2 Torr) Hg-assisted UV deposition system using SiH4 and N20 as source gases. Depositions were carried out at substrate temperatures of 75°C to 170°C. MIS capacitors, fabricated on n-epi/n+-InP substrates (to minimize series resistance) with Al or Ti/Pt/Au metallizations were characterized using C-V measurements. We show that long-term (16 h 300°C in H2) anneals reduces interface state density (Dit), oxide fixed charge, and C-V hysteresis. Dit values of < 1x1011 cm-2eV-1, adequate for good MISFET operation, were routinely obtained over a large portion of the bandgap. InP MISFETs with 1-μm gatelength fabricated with this oxide showed good performance at 20 GHz. C-V measurements with only positive and only negative voltage sweeps showed C-V hysteresis to be a function of both the magnitude and sign of the bias voltage. Positive bias had the largest effect (n-type capacitors). This suggests that both electron- and hole-trapping occur. C-V measurements at 300 K and 77 K show C-V hysteresis to be independent of temperature, suggesting that a mechanism such as tunneling may be responsible. Short- (100 μs) and long-term (103s) drain-current drift measurements made on ion-implanted, self-aligned-gate InP MISFETs showed drifts of ~ 5%.
Low Temperature Dielectrics And Surface Passivation Of InP
R. Iyer, Z. Zou, C. W. Wilmsen, et al.
Low temperature Silicon Dioxide, deposited on InP at temperatures as low as 120°C, shows improved interfacial quality as judged by quasi-static and high frequency CV measurements. These films are highly resistive and have potential applications in a MISFET technology. Results with sulfur and selenium passivation prior to deposition of SiO2 at higher temperatures show similarly improved interfaces on InP.
Chemical Nature Of Encapsulant-Semiconductor Interface After Rapid Thermal Annealing For InP MISFETs
M. D. Biedenbender, V. J. Kapoor
The chemical nature of the encapsulant-indium phosphide interface before and after rapid thermal annealing (RTA) was investigated using X-ray photoelectron spectroscopy (XPS). Rapid thermal annealing was investigated for ion implanted indium phosphide (InP) metal-insulator-semiconductor field-effect transistor (MISFET) fabrication. Silicon nitride films were used to encapsulate InP for RTA at 700 to 800 C for 10 to 60 sec in pure N2 or H2. The chemical nature of the encapsulant-InP interactions was examined using a sequence of high-resolution X-ray photoelectron spectra at four depths through the interfacial region for the In 3d5/2, P 2p, N 1s, Si 2p, and 0 1s peaks. The possible interfacial native oxides observed from the In 3d5/2 peak were In-O-H compounds such as In(OH)3, In0-0H, or In02. No InPO4 was observed in the P 2p peak. The N 1s peak had a component consistent with N-H or N-N bonding in which the area decreased by 42 to 100% after RTA. Changes in the width of the silicon oxy-nitride component of the Si 2p and 0 1s peaks indicated changes in the composition of the interfacial oxides after RTA. InP MISFET's were made on 2 inch semi-insulating wafers using a 150 keV, 4x1013 cm-2 silicon implant for the source and drain regions. The implanted substrates were rapid thermal annealed at 700 C for 30 sec in N2 or H2. The MISFET's were fabricated with a phosphorus oxide/silicon dioxide gate insulator which had a phosphorus oxide region at the insulator-InP interface. The gate insulator had a breakdown field of 2.5x10 6 V/cm and a resistivity of 1x10 15 Ω-cm. The InP MISFET's had transconductance of 27 mS/mm, channel electron mobility of 1200 cm2V-lsec-1, and drain current drift of 7%.
Interface Properties Of High Barrier Height MIS Diodes On InP
Y. S. Lee, W. A. Anderson
High barrier height metal-insulator (oxide)-semiconductor diodes were fabricated using Au or Yb on p-InP, and Au or Pd on n-InP. Au oxide is unnecessary for p-InP whereas a chemically-grown oxide on n-InP produces a barrier height as high as 0.859eV. Ellipsometry and ESCA were used to determine oxide thickness of about 40A and a mixed composition. Current-voltage-temperature data reveal different conduction mechanisms depending on structure and temperature. Certain conditions suggest a surface state recombination due to a 0.4eV level above the valence band. Operation under steady for-ward or reverse bias stabilizes diodes with thermal oxide on n-InP but shows some degradation with chemical oxides.
Hydrogenation Of InP Surface By Phosphorus-Added Hydrogen Plasma
Takashi Sugino, Aniroot Boonyasirikool, Hiroshi Hashimoto, et al.
Hydrogenation of InP surface has been attempted by the glow discharge plasma of hydrogen and phosphine mixture. It is shown by Auger spectroscopy that the use of the phosphorus-added hydrogen plasma suppresses effectively the preferential etching of phosphorus at the InP surface. A mirror surface of InP is maintained after the plasma exposure even at 250°C. It is verified by SIMS analysis that hydrogen with the density higher than 1 x 1018cm -3 diffuses into the bulk InP to 500 nm in depth. Photoluminescence(PL) intensity of the hydrogenated InP surface is increased by a factor of 2. An intentional slow etching and subsequent PL measurement of the hydrogenated surface shows a significant increase in the PL intensity at the hydrogen-treated surface in addition to a moderately enhanced PL intensity over the hydrogen diffused region. Enhancement of the PL intensity over the hydrogen diffused region may relate to the defect passivation. In addition, a significant increase in the PL intensity at the surface is explained in terms of the band bending at the surface possibly due to an introduction of phosphorus vacancies.
MIS Structures On InP Using Oxide Deposited Near 100°C
K. Vaccaro, B. R. Bennett, J. P. Lorenzo, et al.
We have deposited silicon dioxide by chemical vapor deposition at pressures of 2 to 12 torr and substrate temperatures as low as 75°C. Properties of the films on n-type InP substrates are reported. Hysteresis of less than 0.1 volts is observed in capacitance-voltage curves for the lowest-temperature depositions. For 100°C depositions surface state densities are in the low 1011 cm-2eV-1 range. Changes in the dielectric properties are observed as deposition temperature drops from 300 to 75°C. Relative dielectric constant increases from 4 to 7 and resistivity decreases from 1015 to 1012 ohm-cm. Electrical properties can be further improved by both RTA and conventional furnace annealing.
Electrical Properties Of InxPNy-InP MIS Structures
Y. Iwase, F. Arai, T. Sugano
Effects of deposition conditions on the interface properties of Inx PNy-InP metal - insulator - semiconductor (MIS) structure made by chemical vapor deposition (CVD) of InxPNy films onto InP substrates using PC13, NH3 and In as reagents were investigated. The composition of the films was varied from phosphorous nitride (PNx) without inclusion of In to InxPNy by changing the rate of the gas flow to introduce In during deposition. Electrical properties of the deposited films were found to depend on the concentration of In in the films. By introducing a small amount of In into phosphorous nitride films, the reduction of the frequency dispersion and the hysteresis width of capacitance-voltage (C-V) curve of MIS diodes was achieved. It was also found that the hysteresis type of C-V curve changed from electron injection type to ion drift type according to the amount of In introduced into the film. The density of fast interface trap states as determined from high frequency C-V measurement exhibits minima as low as 1010eV-1 cm-2.
Characterization Of InP Surfaces Using Integral Photoluminescence Measurements
H. J. Frenck, W. Kulisch, R. Kassing
The integral Photoluminescence (PL) signal of an InP surface has been shown to be correlated with its electronical quality. Moreover, measuring the PL is nondestructive and does not require sophisticated environment or equipment. Thus, the integral PL is suited as a tool to in situ study the influence of process steps on an InP surface. In our effort to improve the interface properties of InP MIS structures we used PL to investigate the effect of chemical etchants on the electronical and chemical nature of the InP surface and conducted PL measurements during heating and exposure to a plasma. Well defined conditions are required to obtain useful data. Also, laser induced effects in the InP/ambient system are investigated in detail. In addition informations may be obtained about the chemical nature of the surface layer and the reactions taking place during exposure to an ambient.
Down Stream Pecvd Deposition Of Silicon Dioxide Films On InP With Improved Interface Properties
W. Kulisch, R. Kassing
Most InP MIS-structures developed up to now suffer from the so-called slow drift effects. These effects are thought to be caused by destruction of the InP surface during insulator deposition. We therefore developed a 'soft' downstream PECVD process to deposit silicon dioxide on InP which reduces the concentration of slow states responsible for the drift effects by more than one order of magnitude. This deposition process is not only suited for preparation of InP MIS-structures but can be used to passivate optoelectronical devices on InP as well. An example will be given with the improvement of the dark current characteristics of InP-pin-diodes.
The Passivation Of InP By In (PO3)3 Condensed Phosphates For MISFET Applications
J. Joseph, Y. Robach, G. Hollinger, et al.
Very recently high quality MISFET devices have been fabricated using native In(PO3)3-like condensed phosphates. It is believed that the high performance obtained is related to the particular physicochemical and structural properties of these phosphates. They exhibit good intrinsic dielectric properties (resistivity : 10 13 Ω.cm, bandgap ~6.8 eV). A high degree of structural flexibility favors crystallo-chemical matching between the semiconductor and the oxide. Growth of these native oxides leads to a buried interface with a relatively smooth oxide/semiconductor interface (roughness of about 20 Å).
High Pressure Oxidation Studies Of InP And GaAs
U. K. Chakrabarti, G. P. Schwartz, R. A. Laudise, et al.
The high pressure oxidation of InP has been studied using Raman scattering in order to examine the oxidized films for the presence of elemental Group V inclusions. Thermo-dynamic analysis of the In-P-0 phase diagram predicts that InPO4 should be the only phase produced under equilibrium growth conditions. Previous literature reports however, have shown that elemental red P inclusions are present for oxidation temperatures around 500°C at nominal oxygen pressures around 1 atmosphere. This finding indicates that kinetic factors play an important role in determining the phases present in the oxidation of InP at these temperatures. Attempts to modify the kinetics by performing the oxidation at high pressure were first performed by Wilmsen et al., and their x-ray photoemission experiments were interpreted to suggest that elemental P inclusions were suppressed by the high pressure treatment. The current Raman scattering experiments clearly demonstrate that the latter conclusion is not correct; elemental red P is detected in all oxidized InP films independent of substrate doping for oxygen pressures up to ~300 atmospheres. GaAs has also been examined with Raman scattering. For GaAs the equilibrium phase diagram does predict that elemental As is an equilibrium phase, and that finding has been verified for low pressure oxidation conditions in past studies. The present study demonstrates that elemental As is also a product of oxidized GaAs films for oxygen pressures up to 300 atmospheres for n, p, Cr and undoped substrates.
Passivation Of InP Using A Surface Science Approach : THE Al2O3/As//InP CASE
M. Gendry, R. Blanchet, G. Hollinger, et al.
A new approach is presented for the development of a MISFET technology. It is applied to the optimization of A1203/InP structures prepared by the deposition of evaporated A1203 on arsenic stabilized InP surfaces. MBE and surface science techniques (XPS and RHEED) are used to control step by step the elaboration of the structures and to describe the microscopic properties of the interfaces. The optimization of the elaboration process is based on correlations between physico-chemical properties and MIS electrical properties. It is shown that an interfacial oxide buffer layer can favor chemical matching between A1203 and InP.
The Sulfur Passivation Of InP And GaAs Surfaces
K. M. Geib, J. Shin, C. W. Wilmsen
Recently, sulfur treatments have been reported which passivate the InP and GaAs surfaces. From the variety of experiments reported on sulfurized surfaces, it is clear that the treatments can improve the electronic properties, however, the chemistry of the surface after the treatments has not been fully explained. We have applied X-ray photoelectron spectroscopy to determine the bonding of the InP and GaAs surfaces after a variety of sulfur treatments. Based on these data and that reported in the literature, we propose a model in which the sulfur at low temperature only chemisorbs on the surface and does not break back-bonds or intermix with the substrate. We postulate that thermodynamics does not determine the low temperature surface chemistry. Instead, the wet chemistry processing plays the major role since it determines which species of the substrate atoms will terminate the surface. The GaAs appears to be As terminated and hence As-S chemisorption bonds primarily occur. On InP the S bonds to the surface In atoms.
Technology And Drift Characteristics Of UVCVD-SiO2 / InP MISFET Devices
P. Dimitriou, A. Falcou, P. Krauz, et al.
Ion implanted planar MISFET's on semi-insulating indium phosphide substrate were studied. In-situ treatment with ammonia and UV activated CVD of silicon dioxide provided for threshold voltage drift below 0.5 V on depletion-mode transistors. Inverters from enhancement/depletion transistor pairs and 19-stage ring oscillators were made.
A New Fabrication Approach For Planar, Ion-Implanted InP JFETs
J. B. Boos, W. Kruppa, B. Molnar
A new, planar, fully ion-implanted indium phosphide (InP) junction field-effect transistor (JFET) fabrication process is described which utilizes n* source-drain implantation, Be and Be/P p+ gate implantation, a AuZn/Ni/TiW/Au gate metallization and proximity rapid thermal annealing. The JFETs exhibit a gate leakage current of approximately 40 nA at -8 V for a 1 pm x 150 μm gate, a reverse breakdown voltage of 17.5 V at 25 μA, and a maximum transconductance of 140 mS/mm. The addition of a Ni layer in the gate metallization significantly improves its adhesion. The specific contact resistance of the new gate structure is measured to be as low as 2 x 105 ohm-cm2,which is the lowest value reported to date for contacts to p-type InP.
Annealing Conditions For Fe Doped Semi-Insulating InP
K. Kainosho, H. Shimakura, H. Yamamoto, et al.
Fe doped semi-insulating InP single crystals have been grown by using highly purified InP materials. The uniformity of resistivity over the wafer was evaluated by using the three-electrode guard method with the electrode pitch of 100 μm. The uniformity of resistivity was largely improved by the recent crystal preparation. SiNx cap annealing after Si ion implantation has been performed by using these highly uniform wafers with the Fe concentration ranging from 8x1015 to 5x1016 cm-3. It was found that the uniformity is degraded when the wafer is annealed at 700°C while the uniformity is kept constant when the wafer is annealed at below 700°C. The activation efficiency was found to be maximum when the wafer is annealed at 620°C. Photoluminescence measurement clarified that wafers annealed at above 720°C show abnormal spectra at the longer wavelength region(880-980 nm).
Pt/Ti Low Resistance Non-Alloyed Ohmic Contacts To Inp-Based Photonic Devices
A. Katz, S. N. G. Chu, P. M. Thomas, et al.
Pt/Ti low resistance non-alloyed ohmic contacts to p-InP-based contact layers in photonic devices, which were formed by rapid thermal processing (RTP), were studied. E-gun evaporated Pt/Ti metallization deposited onto 1.5 •1019 cm -3 Zn doped In0.53Ga0.47As yielded the best electrical performance. These contacts were ohmic as deposited with a specific contact resistance value of 3.0•10-4Ωcm2. RTP at higher temperatures led to decrease of the specific contact resistance to 3.4 •10-8Ωcm2 (0.08Ωmm) as a result of heating at 450°C for 30 sec. This heat treatment caused only a limited interfacial reaction (about 20 nm thick) between the Ti and the InGaAs, resulted in a thermally stable contact and induced tensile stress of 5.6• 109 dyne •cm -2 at the metal layer but without degrading the adhesion. Heating at temperatures higher than 500°C resulted in an extensive interaction and degradation of the contact.
Rapid Thermal Annealing Of S-Implanted Sent-Insulating InP
Parimala Karighattam, D. A. Thompson
Semi-insulating Fe-doped InP samples have been implanted with 60 keV S+ ions at 300 K, over the dose range of 5x1012 to 5x1015 ions cm-2. Subsequent to implantation, they have been annealed, without encapsulation, using Rapid thermal annealing procedures at temperatures ranging from 650-800°C and for times 2-50 s. The samples have been analysed using Photoluminescence and Hall effect/Conductivity measurements in order to establish the anneal conditions necessary to produce best dopant activation. Results indicate the best anneal condition to be ~800°C for 10 s. Maximum electrical activations ~66% and carrier concentrations up to 3x1019 cm-3 have been obtained. PL spectra of S+ implanted and annealed InP show new features at 1.378-1.380 eV that can be ascribed to S impurities. Samples implanted with lx1014 cm-2 and 1x1015cm-2 (S+Si) ions have also been studied.
A Study Of Enhanced Barrier Height Gates For n-InP MESFET's
A. A. Iliadis, W. Lee, O. A. Aina
We developed a surface passivation technique to enhance the barrier height of n-InP and studied the stability of the resultant contacts. The results showed that the passivation produced nearly-ideal Schottky contacts with substantially enhanced barrier heights (Φb = 0.83). We used the passivation technique to fabricate an n-channel InP FET with enhanced barrier height gates. The devices showed high stability, a maximum transconductance of 60 mS/mm and high break-down voltages. The high stability and performance of these devices demonstrates the potential this passivation holds in developing gate metallization technology for InP.
Barrier Ohmic Contacts To Indium Gallium Arsenide
P. J. T. Mellor, J. Herniman
The addition of a barrier layer to Ni-Au-Ge Ohmic contacts on n-InGaAs were investigated over a range of alloying/sintering temperatures and surface pre-treatments. A 20% HCl dip followed by deposition of Ni-Au-Ge-ZrB2-Au produced good ohmic contacts, electrically and physically. These had contact resistance values of 0.33 Ω.mm as deposited and a minimum of 0.05 Ω.mm for a peak sinter temperature of 260°C. Specific contact resistivity was in the 10-7 Ω.cm2 range. Contact stability and morphology were shown to be enhanced by use of the barrier layer. Using a barrier layer there was no significant rise in contact resistance after 100 h at 300°C; without a barrier layer the resistance increased by 73%. J-FETs fabricated in InGaAs on InP with a ZrB2 barrier have been fabricated successfully. The measured contact resistance was < 0.03 Ω.mm which has contributed to the good current and transconductance characteristics.
A Monolithically Inletrated Receiver Front-End Comprista& Ion-Implanted Lateral Interdigitated IngaAs Pin And Inp Jfet Devices
W. S. Lee, S. A. Kitching, S. W. Bland
An optical receiver front-end consisting of a lateral interdigitated InGaAs PIN photodetector integrated with an InP JFET amplifier has been fabricated by selective ion implantation. The lateral interdigitated InGaAs PlN is integrated here for the first time. The advantages of the lateral detector structure are its inherently low capacitance and the simplification of the InGaAs material growth requirement to a single layer. A quasi-planar integration approach has been developed in conjunction with a two-level metallisation interconnect scheme employing polyimide as the inter-level dielectric. An optical sensitivity of -29 dBm has been measured at 560 Mbit/s and 1.3 µm wavelength.
Nickel In Ohmic Contacts To Indium Phosphide
M. F.J. O'Keefe, R. E. Miles, M. J. Howes
A study of NiAuGe contacts to InP has been undertaken. Various cleaning procedures, metalisation combinations and heat treatments have been investigated. During electrical optimisation and subsequent physical analysis the importance of Ni in the NiAuGe contact to InP became apparent. Major differences between the GaAs/NiAuGe and InP/NiAuGe contacts are suggested. TEM micrographs, for the InP system, show an ordered layer structure of constituent phases. These observations are confirmed by RBS results and also agree with other investigations. The most important observations are those associated with nickel and its role during the formation of ohmic contacts to InP. Nickel was found to form ohmic contacts in a similar manner to the ohmic metalisation NiAuGe. As the alloying temperature was increased to the optimum of 450°C, the effective barrier height was initially observed to increase, then above 350°C to fall as the contact became ohmic. NixPy phases are responsible for ohmic behaviour similar to those observered in the NiAuGe ohmic contact.
Pseudomorphic GaInP Schottky Diode On InP
S. Loualiche, A. Ginudi, D. Le Corre, et al.
GaInP material has been used as a high gap semiconductor on InP to fabricate Schottky diodes. The experimental result shows that the device exhibits good electrical properties when the ternary strained layer is below the critical thickness. The best device is obtained with a Gallium composition of 25%, a GaInP thickness of 100 A, and has a barrier height of 0.73 eV, an ideality factor of 1.1 and a reverse current of 0.3 nA at -1V.
Monolithically Integrated Ga0.47In0.53As MISFET Inverters
M. Renaud, P. Boher, J. Schneider, et al.
Discrete n-channel Depletion and Enhancement mode Si3N4/ GaInAs MISFETs as well as monolithically integrated Si3N4/GaInAs MISFET inverters which consist of an enhancement type driver FET and a depletion type load FET will be presented and discussed. Using Multipolar Plasma Enhanced Si3N4, deposition on a "native oxide free" GaInAs surface, the transconductance is 160 mS/mm (L8 = 2μm) in both D- and E-regimes and the drain current drift under operating conditions, which is the major problem of InP and GaInAs MISFETs, is absolutely negligible at low VDS and about 3% after 30 h at VDS = 3 V. Preliminary results, measured on inverters with conventional PECVD Si3N4 exhibit a DC gain of 4.8.
An InP-InGaAs Light Amplifying Optical Switch
S. A. Feld, C. W. Wilmsen, M. Hafich, et al.
Optical devices which perform logic functions and that can be cascaded, require optical gain. This mandates that the device contain an active element. We have designed such a device which we call a light amplifying optical swtich (LAOS). The gain is obtained from an NPN heterojunction bipolar phototransistor which is in series with a light emitting diode or laser. The first LAOS structure has been fabricated from lattice matched InGaAs on InP using gas source molecular beam epitaxy. A strained layer optical electrical absorber is sandwiched between the light emitter and the detector in order to reduce positive feedback and prevent latching. Analysis indicates that electrical gains of 3000 and optical gains as high as 100 can be obtained.
Wide-Wavelength InQaAs/InP PIN Photodiodes Sensitive From 0.7 To 1.55 um
S. Kagawa, K. Inoue, I Ogawa, et al.
We have demonstrated for the first time a wide-wavelength InGaAs/InP PIN photodiode for optical communication systems working area the 0.7 to 1.55 um wavelength region. The diode has a planar structure with InP/InGaAs/InP double-hetero epitaxial wafer grown by chloride VPE. To obtain high-sensitivity to 0.7 um wavelength light, it has a very thin InP cap layer (0.06 um) and a shallow p-n junction (0.27 um) is formed in the InGaAs layer. Quantum efficiencies for 0.78 um and 1.3 um wavelengths are 76% and 81%, respectively. Dark current and capacitance are as low as 30 pA and 0.53 pF at 5V. Frequency response is flat up to 1 GHz over 5V at 0.78 um.
InP/InGaAs Based Charge-Coupled Devices For MQW Spatial Light Modulator Applications
K. Y. Han, C. W. Chen, J. H. Quigley, et al.
This paper discusses the development of InP based Charge-Coupled Device addressed Multi-Quantum Well Spatial Light Modulators. These devices are based on the quantum-confined Stark effect and promise to be very fast, with response times in the fractional nsec range.
1.3 µm InGaAsP/InP Flat-Surface Buried Heterostructure Laser Diode Fabricated On P-Type Substrate
I. Ushijima, S. Osaka, A. Fukushima, et al.
1.3 µm Flat-surface Buried Heterostructure (FBH) laser diode fabricated on a p-type substrate is reported. This laser exhibits a low threshold current and excellent lasing characteristics up to 120°C. For high temperature range operation, it is found that the active layer thickness plays an important role. Stable CW operation has been confirmed in 85°C 5 mW aging test.
Sensitivity Of Optoelectronic Receivers
C. R. Zeisse
The formula used to predict wide-band noise of optoelectronic receivers has been modified to account for parasitic resistances in the transistor connected to the photodiode. The new formula leaves the total noise unchanged after proper steps have been taken to adjust the transistor gate width for minimum noise. The discrepancy between measured and predicted noise of 1.65 μm monolithic InP receivers thus remains largely unexplained.
The Origin And Effects Of Carrier Leakage In GaInAsP/InP Lasers
K. D. Chik, B. A. Richardson
The characteristics of carrier leakage and the effects of carrier leakage on the lasing threshold and its temperature dependence in 1.3μm wavelength GaInAsP/InP double heterojunction lasers have been calculated and compared with experimental results. The agreement between measured and theoretical results provides strong evidence that carrier leakage in such devices is related to the Auger recombination processes.
New LED In Synthesized InP Yb Material
H. L'Haridon, D. Moutonnet, Y. Toudic, et al.
New light emitting diodes at 1.00 μm obtained from synthesized InP : Yb bulk crystal are studied. The n-type Yb doped bulk material was grown by gradient freeze method. Mg+ ions were implanted in this material for p-type layer. The indepth localization of the junction is not critical. Photoluminescence and electroluminescence spectra are performed from 77 K to 300 K. Two peaks are observed : band edge emission (0.88 pm) and intra shell 4f-4f for Yb ions. The variation of EL intensity with diode forward current shows a Yb3+ emission about 40 times higher than band edge emission. No influence of temperature is observed on Yb3+ peak linewidth and wavelength.
Progress In Indium Phosphide Solar Cell Research
I. Weinberg, D. J. Brinker, C. K. Swartz, et al.
Following a short history of the previous terrestrial program, progress is reviewed, emphasizing the use of InP solar cells in space. State-of-the-art cells have been processed by open and closed tube diffusion, OMCVD and ion-implantation and DC magnetron sputtering. Air mass zero total area efficiencies near 19% were achieved and computer modelling studies indicate that efficiencies over 21% are feasible. Radiation effects studies in both the laboratory and space are described and a comparision made between the radiation resistance of InP, GaAs and Si. Computer modelling studies are described emphasizing the behavior of InP concentrator cells at high concentration and elevated temperature with applica-tion to both the Cassegranian and SLATS concentrator systems. Pro-duction cells are discussed including their intended use to power a spacecraft scheduled for launch in 1990. Several potentially fruit-ful areas are suggested for future research.
Epitaxial InP And Related III-V Compounds Applied To Solar Cells
M. W. Wanlass, G. S. Horner, T. A. Gessert, et al.
The application of InP and related low-bandgap, III-V alloys grown by atmospheric pressure metalorganic vapor phase epitaxy (APMOVPE) to photovoltaics is discussed. The work is presented in two parts: the first is aimed at increasing the performance of InP shallow-homojunction cells via improved emitter designs, and the second concerns the development of InP-related low-bandgap ternary and quaternary compounds, and fabrication of solar cells therein. The emitter design study focussed on the majority and minority carrier transport properties of S-doped InP epilayers. This study has resulted in InP shallow-homojunction cells exhibiting substantial improvements in blue response. However, compensating losses in open-circuit voltage and fill-factor prevented overall gains in cell conversion efficiency. The development of solar cells in epilayers of InAsyPi1-y, Ga0.47In0.53As and GaxIn1-xAsyP1-y as applied to tandem solar cells is also discussed. Low-bandgap cells with good performance have been fabricated and areas for futher improvement have been outlined.
Indium Phosphide Solar Cells Made By Closed-Ampoule Diffusion Of Sulphur Into Cadmium-Doped Inp Substrates: Dependence Of Cell Characteristics On Diffusion Temperature And Time
Mircea Faur, Maria Faur, Chandra Goradia, et al.
We have studied the dependence of solar cell performance characteristics on diffusion temperature and time, for cells made by the closed-ampoule thermal diffusion of S into Cd-doped InP substrates of starting doping 1.7x 1016 cm-3. Diffusions were performed at 600, 625, 650, 700, and 725°C for 3 hours, 675°C for 1, 2, 3 and 4 hours, and, on specially treated substrates with phosphorus-rich surfaces, at 650 and 660°C for 3 hours. We have measured Isc, Voc, FF, η, spectral response, J0 and A factor, series and shunt resistances, and emitter sheet resistance and specific contact resistance of front metallization. Our results indicate that for best solar cell efficiency, the diffusion temperature should be between 650 and 675°C and the diffusion time should be from 1 to 3 hours, for our Cd-doped material.
A Review Of ITO/InP Solar Cells
T. J. Coutts, X. Li, T. A. Gessert, et al.
A review is presented of the performance of indium tin oxide (ITO)/InP solar cells fabricated by a variety of methods. The highest efficiency device has been made using DC magnetron sputter deposition of the ITO and an efficiency of 18.9% global has been achieved. Analysis of type conversion effects near the surface of the p-type InP substrates indicates that all devices appear to operate as n/i/p solar cells. Although the detailed performance of the devices fabricated by different methods appears to be different, it is shown that all can be explained within the framework of the n/i/p model. Hence, this is used to indicate directions for the further improvement in efficiency of this device.
Aspects Of Processing Indium Tin Oxide/Inp Solar Cells
T. A. Gessert, X. Li, T. J. Coutts, et al.
In order to fabricate high efficiency indium tin oxide/InP solar cells, the aspects of electrical contacts and antireflection coatings must be carefully addressed. It has been determined that low resistance electrical contact can be made to p- InP by using a AuBe alloy and properly sintering. Additionally, low resistance, stable and adherent grid contacts can be made to indium tin oxide with the use of Cr/Pd/Au metallization. With proper design, the total power losses of these grid contacts can be limited to about 3.0%. Finally, the design and effects of a double layer antireflection coating using indium tin oxide and magnesium fluoride are discussed indicating that this aspect of cell design still contains several opportunities for improvement.
Inp Solar Cells On Silicon Substrates
C. J. Keavney, S. M. Vernon, V. E. Haven, et al.
This paper describes InP solar cells which were made by metalorganic chemical vapor deposition on GaAs-coated Si substrates. Various values of emitter thickness and doping levels were used for these cells. Air mass zero efficiencies of 7.1% were achieved with this material, and 9.4% with GaAs substrates. Various techniques have been developed for improving the material quality of GaAs-on-Si films, resulting in efficiencies as high as 18% AMO for heteroepitaxial GaAs cells; the efficiencies achievable if these can be successfully applied to InP are calculated.
XPS, Auger And SEM Analysis Of The InP Surface After Closed-Ampoule Diffusion With Sulphur At Several Diffusion Temperatures
Maria Faur, Mircea Faur, Manju Ghalla, et al.
In an attempt to identify the factors which limit the performance of InP solar cells made by the closed-ampoule diffusion of sulphur into p-type InP substrates, and in order to optimize the fabrication process, we have done a detailed analysis of the InP surface and of the diffused emitter region using XPS, Auger, SEM and EDAX for diffusion temperatures of 600, 625, 650, 675, 700 and 725°C for a fixed diffusion time of 3 hours, and diffusion times of 1, 2, 3, and 4 hours for a fixed temperature of 675°C. In this paper, we present the results of this analysis, showing how the morphology and chemical composition of the InP surface layer changes with the diffusion temperature and identifying the possible mechanisms which limit the photocurrent and the open circuit voltage of solar cells fabricated using the closed-ampoule diffusion process.
MBE Grown A1GaAs/InP Mis System And Its Hetero-Mis Gate InP Fet's
T. I toh, K. Asano, K. Kasahara, et al.
This paper reports the characterization of AlGaAs layers grown directly on InP substrates by MBE and its MIS interfacial properties, and the fabrication and the performance of millimeter-wave InP FET's with an AlGaAs hetero-MIS gate structure and a selective ion-implantation channel. The hetero-MIS interface has been shown to have favorable properties for stable depletion-mode FET applications. The fabricated FET's with a recessed gate structure exhibited good and stable DC characteristics with high current and high breakdown voltage of over 30 V. The cut-off frequency of 25 GHz and the maximum stable power gain of 12 dB at 26 GHz were obtained for a hetero-MIS gate InP FET with gate length of 0.6 μm. Furthermore, at 38 GHz, a fabricated power FET with gate width of 420 μm exhibited maximum output power of 100 mW (0.25 W/mm), promising the use of these InP FET's for microwave and millimeter-wave power applications.
GaInAs Misfet Wideband Microwave Power Amplifiers
D. Bechtle, L. C. Upadhyayula, P. D. Gardner, et al.
We present the first reported results on wideband GaInAs MISFET amplifiers. Using 1-μm-gatelength, 0.56-mm-gatewidth GaInAs MISFETs, we obtained: (a) a power output of 230±30mW (0.41 W/mm) with 33±3% power-added efficiency; (b) power output of 265±15 mW (0.47 W/mm) with 30±3% power-added efficiency, both over the 7- to 11- GHz band, and (c) a power output of 220 ±45 mW (0.39 W/mm) with 29 ±4% power-added efficiency over the 6- to 12-GHz band. With a 0.7-μm-gatelength GaInAs MISFET, a small-signal gain of 5±0.5 dB over the 11.4- to 22.6-GHz band was obtained. These data include all connector, bias network, and circuit losses. We also present an equivalent circuit model of 1-μm-gatelength GaInAs MISFETs based on S-parameter measurements. The model is essentially that for a MESFET with capacitors representing gate-to-source and gate-to-drain overlap capacitances added at input and output.
"Basics And Recent Applications Of High Efficiency Millimeter Wave Inp Gunn Diodes"
Berin Fank, Jim Crowley, Dominic Tringali, et al.
InP Gunn diodes with current limiting cathodes have proven to be highly efficient, medium power devices at millimeter wave frequencies up to 110 GHz. Device and circuit designs have continously improved and cw efficiencies of 21% and 6.3% have recently been obtained at 35 GHz and 94 GHz respectively. Using these basic InP devices in planar microstrip circuits along with special flip chip GaAs varactors, wide band tunable planar VCO's have been developed for these millimeter wave frequencies. Also as a result of the current limiting design, these InP Gunn diodes work well as stabilized reflection amplifiers and stable amplifier designs have been made up to 110 GHz with output power levels sufficient to drive very high output power tubes.
InP Devices For Millimeter-Wave Monolithic Circuits
S. C. Binari, R. E. Neidert, H. B. Dietrich
High efficiency, mm-wave operation has been obtained from lateral transferred-electron devices (TEDs) designed with a high resistivity region located near the cathode contact. At 29.9 GHz, a CW power output of 29.1 mW with a conversion efficiency of 6.7% has been achieved with cavity-tuned discrete devices. This result represents the highest power output and efficiency of a lateral TED in this frequency range. The lateral devices also had a CW power output of 0.4 mW at 98.5 GHz and 0.9 mW at 75.2 GHz. In addition, a monolithic oscillator incorporating the lateral TED has been demonstrated at 79.9 GHz. InP Schottky-barrier diodes have been fabricated using selective MeV ion implantation into semi-insulating InP substrates. Using Si implantation with energies of up to 6.0 MeV, n+ layers as deep as 3 μm with peak carrier concentrations of 2 x 1018 cm-3 have been obtained. These devices have been evaluated as mixers and detectors at 94 GHz and have demonstrated a conversion loss of 7.6 dB and a zero-bias detector sensitivity as high as 400 mV/mW.
LP-MOCVD InP Gunn Diodes Developped For 94 Gift Millimeter Range Operation
M. A. di Forte-Poisson, C. Brylinski, N. Proust, et al.
This paper reports recent progress in 94 GHz InP Gunn device development in our laboratory. High power, high efficiency Gunn diodes working in the 94 GHz millimeter range were made from InP epilayers grown by low pressure metalorganic chemical vapor deposition (LP-MOCVD). High quality InP layers were successfully grown using trimethylindium or triethylindium and phosphine. Non intentionally doped InP layers exhibited net residual donors as low as 8.1013cm-3 with Hall mobility as high as 200000cm 2V-1s-1 and 300000 cm2V-1s-1 (60K) using triethylindium and trimethylindium as indium sources respectively. The ability of LP-MOCVD to grow high purity indium phosphide as required for Gunn effect devices has led to significant improvements in the performances of these devices. The InP Gunn diodes processed using the integral heat sink technique have delivered up to 150 mW CW output power with 3.5% efficiency at 94 GHz. Aging tests performed at 85°C on biased diodes with average CW output power of 80mW have demonstrated typical mean time to failure (MTTF) in excess of 20000 hours.
Silicon-Implanted Thermally-Annealed N-InP Layers For Microwave Power MISFETs
S. G. Liu, P. D. Gardner, S. Y. Narayan, et al.
This paper presents the electrical characteristics of InP layers produced in semi-insulating (SI) InP by Si implantation and thermal annealing. We also describe the performance of microwave power MISFETs fabricated on implanted/annealed N+N layers. The implanted layers were activated using an operationally-simple proximity anneal technique. The all-implanted power MISFETs were fabricated using a low (<1011 cm-2 eV-1) interface-density gate-oxide (Si02) layer that results in long-term drain current drift of less than 5%. Power output of 250 mW with 6-dB gain and 26% power-added efficiency was obtained at 10 GHz from 1-µm-gatelength MISFETs having 560-μm periphery. Cutoff frequencies of 43 GHz were deduced from S-parameter data measured on these devices.
High Dynamic Range GaInAs MISFET Mixers
K. W. Chang, E. J. Denlinger, P. D. Gardner
The Ga0.47In0.53As (GaInAs) metal-insulator-semiconductor field-effect-transistor (MISFET) has a desirable combination of characteristics for passive, switch-type FET mixers. This paper describes the investigation of passive FET mixers using GaInAs MISFETs for microwave applications. At X-band, these mixers have dynamic range superior to their counterparts of active GaAs metal-semiconductor FET (MESFET) and diode mixers for the same LO input power level. Furthermore, one of the reported mixers can operate without any DC bias.
Indium Phosphide-Based Heterojunction Bipolar Transistors.
Jean-Luc Pelouard, Michael A. Littlejohn
The Heterojunction Bipolar Transistor (HBT) is not a new device. In the late 1940's W. Shockley1 gave the basic ideas and, about ten years later, H. Kroemer2 published the first paper to show the promising advantages of this new structure. The first device applications have been demonstrated in AlGaAs/GaAs materials, taking advantage of the natural lattice match in this system. Currently, high performance GaAs-based HBTs have been reported and the InP-based transistors are still promising. In this paper we will review the reasons why this device has required more than forty years of development and what its future can be in the InP-based materials systems.
Physics Of InP/InGaAs Heterostructure Bipolar Transistors For EHF Applications
M. Meyyappan, M. A. Osman, G. A. Andrews, et al.
A detailed examination of the physics of the InP based heterostructure bipolar transistors is reported. The governing drift and diffusion and Poisson's equations are solved numerically in two dimensions. The results show current gain as high as 26300 and an fT of 78.6 GHz for an InP/InGa As/InP double heterostructure. The electric field profiles from the simulation are used in an adjunct Monte Carlo procedure to assess the effects of velocity overshoot. The Monte Carlo results indicate a substantial reduction in base and collector transit times from the corresponding drift and diffusion equation (DDE) simulations.
Monte Carlo Simulation Of A Submicron Pseudomorphic GaA1As/InGaAs/GaAs HEMT
Duke H. Park, Kevin F. Brennan
We present a first principles theoretical analysis of the performance of a 0.35 μn Al0.15 Ga0.85 As/InO.15Ga0.85As pseudomorphic high electron mobility transistor (HEMT) based on an ensemble Monte Carlo simulation coupled with a two-dimensional Poisson solver. The model contains the full details of the two-dimensional electron gas, nonstationary transport, i.e. ballistic transport and velocity overshoot, real space transfer, and the effects of the two-dimensional electric field profile. In order to ensure the reliability of the model, it is carefully tested throughout each stage of its development to experimental data or other independent calculations. Finally, the model calculations are compared to experimental measurements for a comparable device, Excellent agreement between the calculated and experimentally measured current-voltage characteristic is found. From an analysis of the underlying transport physics, the high speed performance of the pseudomorphic HEMT is found to arise from the superior electron confinement properties within the channel layer.
Magnetoconductance Oscillations In InGaAs/GaAs Lateral Surface Superlattices
J. Ma, R. A. Puechner, W.P. Liu, et al.
Lateral surface superlattice (LSSL) structures have been prepared on MBE grown In0.2Ga0.8As/GaAs strained layers by electron beam lithography and metal lift-off processing. The LSSL is induced by a 160-nm period Ti/Pt/Au grid replacing the normal metal gate of a HEMT. Magnetoconductance measurements made at 5K show universal conductance fluctuations with an amplitude of 0.1e2/h and Aharonov-Bohm type periodic oscillations with h/e periodicity in the flux coupled through each cell of the superlattice. To the best of our knowledge, this is the first observation of Aharonov-Bohm effect in a solid state system that was not in a ring structure.
Monte Carlo Investigation Of Minority Electron Transport In InP
M. A. Osman, H. L. Grubin
The transport of minority electrons in p-type InP has been investigated for acceptor doping level of 1018 cm3 using Monte Carlo procedures. Is is found that the velocity of minority electrons are significantly lower than that of majority electrons for fields below 15 kV/cm and slightly higher at higher fields. The study shows that the interaction between the electrons and majority holes leads to reducing the mobility of electrons from 2000 cm2 /Vs to 1500 cm2 /Vs.
Radiation Effects On InP-Based Electrical & Optical Devices
K. N. Vu, J. Y. Yaung
Radiation effects on InP-based electrical and optical devices are discussed from the standpoint of device structure and physics. The devices addressed are High Electron Mobility Transistor (HEMT), Heterojunction Bipolar Transistor (HBT), and solar cells. Radiation effects due to neutrons, gamma rays, electrons, protons, x rays, and total dose radiation can result in device parameter degradation, upset, burnout, and current leakage problems. The effects are correlated to device structure and material properties. Comparisons are made to GaAs or Si devices that have performance characteristics similar to the above-mentioned InP devices. Finally, recommendations are made for testing and modeling these effects.
InP JFET Equivalent Circuit And Negative Resistance Effects
W. Kruppa, J. B. Boos
The small-signal equivalent circuit of an ion-implanted InP JFET is presented. The nominal design parameters of the JFET include a 1017 cm-3 channel doping, a channel thickness of 0.2 μm, and a gate length of 2 μm. Based on measured S-parameters, the values of fr and fmax, are 10 and 22 GHz, respectively, which are the largest measured values for an InP JFET reported to date. The output resistance is found to be less than that of a corresponding GaAs MESFET and a larger VDS has to be applied to reach its maximum value. The gate-to-drain feedback capacitance has a value between those of GaAs and InP MESFETs. Negative differential resistance, as evidenced by dc and microwave measurements, is observed in devices with a channel thickness larger than approximately 0.5 μm. This result, adjusted for possible substrate current, is shown to be consistent with the simple theory of stationary Gunn domain formation.