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Proceedings Paper

Damage To Gate Oxides In Reactive Ion Etching
Author(s): I. W. Wu; R. H. Bruce; M. Koyanagi; T. Y. Huang
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Paper Abstract

The damage incurred during reactive ion etching is studied by using MOS capacitors with various sizes of surface metal pads attached to the gate electrode as charge collectors. Wet oxides show a sharper breakdown distribution and a higher resistance to plasma damage than dry oxides. High resolution electron microscopy shows that the Si/Si02 interfaces of dry oxides are much rougher than that of wet oxides both in terms of the extrusion heights and spacings. An anomalous leakage current in negative-gate IV characteristics was found for fully processed CMOS transistors and capacitors with metal pad antenna, indicating the nature of electrostatic induced hole trapping near the polysilicon gate/SiO2 interface. These residual trapped charges may be due to hole tunneling from gate electrode into oxide from an induced positive-gate bias. Breakdown characteristics are significantly degraded when electrons are injected from the polysilicon gate as opposed to injection from the silicon substrate. The most prominent effect of the electrostatic damage is the degradation in breakdown voltages of the defective oxides.

Paper Details

Date Published: 30 January 1990
PDF: 12 pages
Proc. SPIE 1185, Dry Processing for Submicrometer Lithography, (30 January 1990); doi: 10.1117/12.978067
Show Author Affiliations
I. W. Wu, Xerox Palo Alto Research Center (United States)
R. H. Bruce, Xerox Palo Alto Research Center (United States)
M. Koyanagi, Hiroshima University (Japan)
T. Y. Huang, Xerox Palo Alto Research Center (United States)

Published in SPIE Proceedings Vol. 1185:
Dry Processing for Submicrometer Lithography
James A. Bondur; Alan R. Reinberg, Editor(s)

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