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Proceedings Paper

Systolic Applications For Digital Image/Video Processing Applications
Author(s): S. Y. Kung; R. W. Stewart; S. C. LO
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Paper Abstract

This paper uses a powerful three stage mapping methodology to realize highly concurrent systolic array processor architectures for image processing. The paper addresses the issues of designing special purpose systolic image enhancement processors for edge detection and median filtering and designing configurable general purpose systolic signal processors for Kalman filtering and artificial neural networks. The latter two arrays can then be specifically configured for image restoration and other image processing problems.

Paper Details

Date Published: 13 October 1987
PDF: 13 pages
Proc. SPIE 0845, Visual Communications and Image Processing II, (13 October 1987); doi: 10.1117/12.976520
Show Author Affiliations
S. Y. Kung, Princeton University (United States)
R. W. Stewart, University of Strathclyde (Scotland)
S. C. LO, Princeton University (United States)

Published in SPIE Proceedings Vol. 0845:
Visual Communications and Image Processing II
T. Russell Hsing, Editor(s)

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