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Proceedings Paper

Heterogeneous integration of epitaxial nanostructures: strategies and application drivers
Author(s): Chi On Chui; Kyeong-Sik Shin; Jorge Kina; Kun-Huan Shih; Pritish Narayanan; C. Andras Moritz
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Paper Abstract

In order to sustain the historic progress in information processing, transmission, and storage, concurrent integration of heterogeneous functionality and materials with fine granularity is clearly imperative for the best connectivity, system performance, and density metrics. In this paper, we review recent developments in heterogeneous integration of epitaxial nanostructures for their applications toward our envisioned device-level heterogeneity using computing nanofabrics. We first identify the unmet need for heterogeneous integration in modern nanoelectronics and review state-of-the-art assembly approaches for nanoscale computing fabrics. We also discuss the novel circuit application driver, known as Nanoscale Application Specific Integrated Circuits (NASICs), which promises an overall performance-power-density advantage over CMOS and embeds built-in defect and parameter variation resilience. At the device-level, we propose an innovative cross-nanowire field-effect transistor (xnwFET) structure that simultaneously offers high performance, low parasitics, good electrostatic control, ease-of-manufacturability, and resilience to process variation. In addition, we specify technology requirements for heterogeneous integration and present two wafer-scale strategies. The first strategy is based on ex situ assembly and stamping transfer of pre-synthesized epitaxial nanostructures that allows tight control over key nanofabric parameters. The second strategy is based on lithographic definition of epitaxial nanostructures on native substrates followed by their stamping transfer using VLSI foundry processes. Finally, we demonstrate the successful concurrent heterogeneous co-integration of silicon and III-V compound semiconductor epitaxial nanowire arrays onto the same hosting substrate over large area, at multiple locations, with fine granularity, close proximity and high yield.

Paper Details

Date Published: 11 October 2012
PDF: 15 pages
Proc. SPIE 8467, Nanoepitaxy: Materials and Devices IV, 84670R (11 October 2012); doi: 10.1117/12.970438
Show Author Affiliations
Chi On Chui, Univ. of California, Los Angeles (United States)
Kyeong-Sik Shin, Univ. of California, Los Angeles (United States)
Jorge Kina, Univ. of California, Los Angeles (United States)
Kun-Huan Shih, Univ. of California, Los Angeles (United States)
Pritish Narayanan, Univ. of Massachusetts, Amherst (United States)
C. Andras Moritz, Univ. of Massachusetts, Amherst (United States)

Published in SPIE Proceedings Vol. 8467:
Nanoepitaxy: Materials and Devices IV
Nobuhiko P. Kobayashi; A. Alec Talin; M. Saif Islam, Editor(s)

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