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Proceedings Paper

Multiprocessor DSP With Multistage Switching Network And Its Scheduling For Image Processing
Author(s): Yasuyuki Okumura; Kazunari Irie; Ryozo Kishimoto
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Paper Abstract

This paper proposes a dynamic load balancing method using a multistage switching network to solve one of the greatest problems in multiprocessor DSPs for image processing: load concentration on certain processors. This method balances the processing load by distributing the total load among processor elements whose loads are small. The load distribution is performed by the multistage switching network, which transmits the load quantity information within the network. A scheduling method for a motion picture coding algorithm using the multiprocessor DSP is also proposed. The scheduling method takes full advantage of the multistage switching network functions in distributing the processing load and sorting the processed results. Using computer simulation, the multiprocessor DSP's performance is shown to be double that of a conventional multiprocessor DSP, when an initially unbalanced load is allocated to the processors, as in picture coding for TV conferences.

Paper Details

Date Published: 1 November 1989
PDF: 10 pages
Proc. SPIE 1199, Visual Communications and Image Processing IV, (1 November 1989); doi: 10.1117/12.970120
Show Author Affiliations
Yasuyuki Okumura, NTT Transmission Systems Laboratories (Japan)
Kazunari Irie, NTT Transmission Systems Laboratories (Japan)
Ryozo Kishimoto, NTT Transmission Systems Laboratories (Japan)

Published in SPIE Proceedings Vol. 1199:
Visual Communications and Image Processing IV
William A. Pearlman, Editor(s)

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