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Proceedings Paper

NTSC-CIF Mutual Conversion Processor
Author(s): Shinji Nishimura; Hideo Kuroda; Yutaka Suzuki; Toshio Tsuchiya
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Paper Abstract

An NTSC-CIF mutual conversion processor is developed that consists of just four VLSI chips, and external four frame memories and five field memories. The new processor can reversibly convert NTSC signals into any one of the four CIF formats. The processor replaces conventional systems consisting of several hundred chips with commensurately lower cost and power consumption. Many circuit devices are developed for the processor. A new PLL circuit, similar to a "tanlock loop" for color demodulation, detects phase error between input and local color sub-carrier by looking up a ROM table. By limiting the detectable phase error range to +/- 45 degrees, the ROM capacity is drastically reduced to 1/146 of that needed for +/- 90 degrees. In order to avoid picture degradation, parallel different band-width filters are adopted. Coefficient sets of horizontal and vertical filters are shared by the four formats. A pre-filter smoothes motion and reduces noise. It utilizes the double buffer frame memories to minimize the required external memory capacity. The VLSI chips are constructed with the advanced Bi-CMOS technology. A 0.8 micron design rule is used and the die size is 144 mm2. A 208-pin PGA package format is used.

Paper Details

Date Published: 1 November 1989
PDF: 11 pages
Proc. SPIE 1199, Visual Communications and Image Processing IV, (1 November 1989); doi: 10.1117/12.970098
Show Author Affiliations
Shinji Nishimura, NTT Human Interface Laboratories and LSI Laboratories (Japan)
Hideo Kuroda, NTT Human Interface Laboratories and LSI Laboratories (Japan)
Yutaka Suzuki, NTT Human Interface Laboratories and LSI Laboratories (Japan)
Toshio Tsuchiya, NTT Human Interface Laboratories and LSI Laboratories (Japan)

Published in SPIE Proceedings Vol. 1199:
Visual Communications and Image Processing IV
William A. Pearlman, Editor(s)

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