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Proceedings Paper

Background Defect Density Reduction Using Automated Defect Inspection And Analysis
Author(s): Steven C. Weirauch
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Paper Abstract

Yield maintenance and improvement is a major area of concern in any integrated circuit manufacturing operation. A major aspect of this concern is controlling and reducing defect density. Obviously, large defect excursions must be immediately addressed in order to maintain yield levels. However, to enhance yields, the subtle defect mechanisms must be reduced or eliminated as well. In-line process control inspections are effective for detecting large variations in the defect density on a real time basis. Examples of in-line inspection strategies include after develop or after etch inspections. They are usually effective for detecting when a particular process segment has gone out of control. However, when a process is running normally, there exists a background defect density that is generally not resolved by in-line process control inspections. The inspection strategies that are frequently used to monitor the background defect density are offline inspections. Offline inspections are used to identify the magnitude and characteristics of the background defect density. These inspections sample larger areas of product wafers than the in-line inspections to allow identification of the defect generating mechanisms that normally occur in the process. They are used to construct a database over a period of time so that trends may be studied. This information enables engineering efforts to be focused on the mechanisms that have the greatest impact on device yield. Once trouble spots in the process are identified, the data base supplies the information needed to isolate and solve them. The key aspect to the entire program is to utilize a reliable data gathering mechanism coupled with a flexible information processing system. This paper describes one method of reducing the background defect density using automated wafer inspection and analysis. The tools used in this evaluation were the KLA 2020 Wafer Inspector, KLA Utility Terminal (KLAUT), and a new software package developed by KLA called "Product Wafer Defect Audit" (PWDA). Automating the wafer inspection task has several advantages over a manual inspection. Among these are consistency of defect capture over time and consistency of sample size. Additional information such as exact location, size, and classifications is retained for each defect found. The software package, PWDA, automatically maintains a database of this defect information. This database allows quick retrieval and manipulation of the data in a variety of ways. The use of PWDA software coupled with auto-matic inspection for an offline inspection program in a fab environment is discussed. This includes examples of setting up and collecting a database, evaluation of the data, and the actions taken to decrease the background defect density level.

Paper Details

Date Published: 1 January 1988
PDF: 8 pages
Proc. SPIE 0921, Integrated Circuit Metrology, Inspection, and Process Control II, (1 January 1988); doi: 10.1117/12.968371
Show Author Affiliations
Steven C. Weirauch, VLSI Technology, Inc. (United States)


Published in SPIE Proceedings Vol. 0921:
Integrated Circuit Metrology, Inspection, and Process Control II
Kevin M. Monahan, Editor(s)

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