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Proceedings Paper

Characterization Of Conditions Required To Implement Submicron Processes Over Topography Using Dry Develop Method(S)
Author(s): Allen C. Spencer; John J. Grunwald; William F. Cordes III; William Moffatt; Ian Latchford; Tso-Ping Ma; Bomy Chen
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Paper Abstract

This paper describes problems encountered in VLSI imaging and pattern transfer, via dry develop, over topography steps up to 1.5 μ in height. The dry develop method studied in this paper involves a vapor-phase silylation process, with consideration being given relative to overall production needs. Specifically, the following issues are considered: a. The choice of the resist to be used in the silylation process: for example, it was noted that the rate/degree of silylation varies with spectral sensitivity of the photoresist (see Table I), i.e. I-line/mid UV systems have shown to be more successful than conventional G-line photoresists. Specifically, positive photoresists that contain coupled, 2-1-4 diazoquinone/novolak esters as sensi-tizers, appear less prone to residual "grass" formation. This being unwanted SiO, formation in the unexposed areas which are then transferred to the wafer surface. b. The type of silylating equipment, the silylating agent, silylating conditions relative to time, temperature, and pressure were evaluated. For this study, the incorporation of hexamethyldisilizane was utilized in a piece of equipment modified to heat the "HMDS", thereby increasing its vapor pressure. c. Processing conditions required for dry developing in Reactive Ion Etch (RIE) vs Magnetron Ion Etch (MIE) were evaluated such as power, pressure, gases, flow and time. d. The potential effects of other variables were also addressed, such as the "HMDS" vapor time and exposure energy requirements needed for adequate silicon/oxide formation. The effects of such variables were studied relative to their impact on the dry development/etch conditions needed.

Paper Details

Date Published: 1 January 1988
PDF: 17 pages
Proc. SPIE 0920, Advances in Resist Technology and Processing V, (1 January 1988); doi: 10.1117/12.968331
Show Author Affiliations
Allen C. Spencer, MacDermid Incorporated (United States)
John J. Grunwald, MacDermid Incorporated (United States)
William F. Cordes III, MacDermid Incorporated (United States)
William Moffatt, Yield Engineering Systems (United States)
Ian Latchford, Yield Engineering Systems (United States)
Tso-Ping Ma, Yale University (United States)
Bomy Chen, Yale University (United States)

Published in SPIE Proceedings Vol. 0920:
Advances in Resist Technology and Processing V
Scott A. MacDonald, Editor(s)

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