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Proceedings Paper

Monolithically Integrated Ga0.47In0.53As MISFET Inverters
Author(s): M. Renaud; P. Boher; J. Schneider; E. Boucherez; Y. Hily; D. Schmitz; H. Jurgensen
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Paper Abstract

Discrete n-channel Depletion and Enhancement mode Si3N4/ GaInAs MISFETs as well as monolithically integrated Si3N4/GaInAs MISFET inverters which consist of an enhancement type driver FET and a depletion type load FET will be presented and discussed. Using Multipolar Plasma Enhanced Si3N4, deposition on a "native oxide free" GaInAs surface, the transconductance is 160 mS/mm (L8 = 2μm) in both D- and E-regimes and the drain current drift under operating conditions, which is the major problem of InP and GaInAs MISFETs, is absolutely negligible at low VDS and about 3% after 30 h at VDS = 3 V. Preliminary results, measured on inverters with conventional PECVD Si3N4 exhibit a DC gain of 4.8.

Paper Details

Date Published: 28 November 1989
PDF: 8 pages
Proc. SPIE 1144, 1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices, (28 November 1989); doi: 10.1117/12.962024
Show Author Affiliations
M. Renaud, Laboratoires d'Electronique et de Physique appliquee (LEP) (France)
P. Boher, Laboratoires d'Electronique et de Physique appliquee (LEP) (France)
J. Schneider, Laboratoires d'Electronique et de Physique appliquee (LEP) (France)
E. Boucherez, Laboratoires d'Electronique et de Physique appliquee (LEP) (France)
Y. Hily, Laboratoires d'Electronique et de Physique appliquee (LEP) (France)
D. Schmitz, AIXTRON (Germany)
H. Jurgensen, AIXTRON (Germany)


Published in SPIE Proceedings Vol. 1144:
1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices

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