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Proceedings Paper

Evidence Of A Surface Trap By DLTS Measurements On GalnAs Planar PIN Photodiodes
Author(s): F. Ducroquet; G. Guillot; J. C. Renaud; A. Nouailhat
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Paper Abstract

Parameters affecting the photodiode dark leakage current, which is one of the main factors which determines the sensitivity of these devices, have been analysed. A dark current drift phenomenon under fixed reverse bias voltage is sometimes observed in planar PIN GaInAs photodiodes passivated by silicon nitride, and is interpreted as a charge transfer from GaInAs layer to the SiNx film. We have used this surface electrical property evolution with time to show that an electron trap detected from DLTS measurements is mainly localized near the GaInAs surface. This mid-gap trap level is supposed to be induced by the passivation process.

Paper Details

Date Published: 28 November 1989
PDF: 6 pages
Proc. SPIE 1144, 1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices, (28 November 1989); doi: 10.1117/12.962000
Show Author Affiliations
F. Ducroquet, Laboratoire de Physique de la Matiere (France)
G. Guillot, Laboratoire de Physique de la Matiere (France)
J. C. Renaud, CNET (France)
A. Nouailhat, CNET-CNS (France)


Published in SPIE Proceedings Vol. 1144:
1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices

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