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Proceedings Paper

Control Of Insulator-Semiconductor Interfaces Of InP And InGaAs For Surface Passivation And Misfet Fabrication
Author(s): Hideki Hasegawa
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Paper Abstract

The present status of the understanding and control of InP and InGaAs insulator-semiconductor(I-S) interfaces is discussed for surface passivation and and MISFET fabrication. The electrical and microstructural properties of. I-S interfaces are reviewed, and the existing models concerning the origin of interface states are compared. Then, based on the DIGS model by the author's group, control of I-S interface through introduction of two types of interface control layer(ICL) is discussed. One is an anodic native oxide layer, and the other is an MBE-grown ultrathin pseudomorphic Si layer, both combined with a thick photo-CVD insulator. Both 1CLs lead to significant improvements in Nss, channel mobility and drain current stability.

Paper Details

Date Published: 28 November 1989
PDF: 15 pages
Proc. SPIE 1144, 1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices, (28 November 1989); doi: 10.1117/12.961997
Show Author Affiliations
Hideki Hasegawa, Hokkaido University (Japan)


Published in SPIE Proceedings Vol. 1144:
1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices

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