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Proceedings Paper

Rapid Thermal Annealing And Solid Phase Epitaxy Of Ion Implanted InP
Author(s): G. Bahir; J. L. Merz; J. R. Abelson; T. W. Sigmon
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Paper Abstract

The production and annealing of damage in (100) InP implanted with Si ions at 77K, room temperature and 200°C have been studied by channeling, Secondary Ion Mass Spectrometry (SIMS), Hall measurement and electrochemical profiling. An ion energy of 180 keV and a fluence of 1014cm-2 produces an amorphous layer which extends to the surface in samples implanted at 77K or room temperature, while samples implanted at 200°C with a fluence as high as 1015cm-2 remain crystalline. For room temperature or 77K implants, the maximum epitaxial regrowth thickness is about 2000Å. An amorphous layer less than 2000Å thick can be nearly completely recrystallized by epitaxial growth, at a temperature of 250°C. The post-anneal residual disorder of thicker layers, following furnace annealing (FA) at 750°C for 15 minutes, is linearly dependent on the initial amorphous layer thickness. A high degree of electrical activation is reached for high temperature implants and low annealing temperature (500°-600°C). In contrast, for room temperature implants annealing at higher temperature using furnace or rapid thermal annealing was required to activate the dopants. The percentage of electrical activation of both low and high fluence ion doses is nearly the same at the optimal condition for rapid thermal annealing (RTA) or furnace annealing, even for the case of residual disorder layers following room temperature implants and furnace annealing. Comparison of the SIMS Si profile with the carrier concentration profile shows compensation at the damage-crystalline interface.

Paper Details

Date Published: 26 June 1986
PDF: 8 pages
Proc. SPIE 0623, Advanced Processing and Characterization of Semiconductors III, (26 June 1986); doi: 10.1117/12.961204
Show Author Affiliations
G. Bahir, University of California (United States)
J. L. Merz, University of California (United States)
J. R. Abelson, Stanford University (United States)
T. W. Sigmon, Stanford University (United States)


Published in SPIE Proceedings Vol. 0623:
Advanced Processing and Characterization of Semiconductors III
Devindra K. Sadana; Michael I. Current, Editor(s)

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