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Proceedings Paper

High-barrier rectifying junctions with amorphous silicon alloy electrodes and their application to FET's for LSI's
Author(s): Katsumi Murase; Masamitsu Suzuki
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Paper Abstract

Properties of "metallic" amorphous silicon alloys and their application to the gate electrode of an FET are described. Amorphous Si-Ge-B prepared by low-pressure CVD and a-Si-Be prepared by RF-sputtering are both metallic in the sense that the density of electron states at and near the Fermi level is finite, though the electron states are localized in contrast to those of metals. The former forms a rectifying junction similar to a metal-semiconductor Schottky-barrier junction with the n-type crystalline semiconductor, while the latter with the p-type one. Barrier heights of 1 V and 0.8 V are obtained for a-Si-Ge-B/n-type GaAs and a-Si-Be/p-type Si junctions, respectively. Such high barriers have not previously been obtained for metal-semiconductor junctions. The performance of FET's is improved by applying these high-barrier amorphous-crystalline junctions to the gate.

Paper Details

Date Published: 12 March 1986
PDF: 8 pages
Proc. SPIE 0617, Amorphous Semiconductors for Microelectronics, (12 March 1986); doi: 10.1117/12.961069
Show Author Affiliations
Katsumi Murase, NTT Electrical Communications Laboratories (Japan)
Masamitsu Suzuki, NTT Electrical Communications Laboratories (Japan)

Published in SPIE Proceedings Vol. 0617:
Amorphous Semiconductors for Microelectronics
David Adler, Editor(s)

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