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Proceedings Paper

Review Of Arithmetic Algorithms And Circuits For High Speed Digital Signal Processing
Author(s): J.Greg Nash
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Paper Abstract

This paper is a review of arithmetic algorithms and circuitry used for VLSI implementation of digital signal processing systems. We also briefly review recent introductions of digital signal processor ICs and provide examples of system specific ICs as well. Performance of the ICs is compared where data is available.

Paper Details

Date Published: 28 July 1986
PDF: 20 pages
Proc. SPIE 0614, Highly Parallel Signal Processing and Architectures, (28 July 1986); doi: 10.1117/12.960502
Show Author Affiliations
J.Greg Nash, Hughes Research Laboratories (United States)

Published in SPIE Proceedings Vol. 0614:
Highly Parallel Signal Processing and Architectures
Keith Bromley, Editor(s)

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