Share Email Print
cover

Proceedings Paper

The APx Accelerator: A High Performance, Low Cost And Compact Parallel Processor Ideal For Image Processing
Author(s): E. Abreu; D. Jenkins; M. Hervin; D. Evans
Format Member Price Non-Member Price
PDF $14.40 $18.00

Paper Abstract

The APx Accelerator is an SIMD Parallel Processor system designed to provide very high computing power in a PC/AT environment. The APx is an expandable system and provides from 64 to 256 16-bit processors which provide peak instruction rates from 800 to 3200 MIPs. The individual processors in the APx Accelerator are 16 bit RISC processors which are quite powerful and versatile. In addition, pairs of 16-bit processors can be configured to operate in 32-bit mode under software control. IEEE format single precision floating point operations are supported in 32-bit mode with peak ratings from 40 to 160 MFLOPs. This paper deals with the synergy of a set of architectural and implementation features that work together in the APx Accelerator to achieve high sustained system performance for a significant set of compute-intensive functions. These features have evolved to meet system-level needs, and include VLSI integration, memory bandwidth, concurrency of operations, inter-processor communications, processor selection mechanisms, and I/O bandwidth.

Paper Details

Date Published: 27 March 1989
PDF: 8 pages
Proc. SPIE 1002, Intelligent Robots and Computer Vision VII, (27 March 1989); doi: 10.1117/12.960311
Show Author Affiliations
E. Abreu, Visionary Systems Inc. (United States)
D. Jenkins, Visionary Systems Inc. (United States)
M. Hervin, Visionary Systems Inc. (United States)
D. Evans, Visionary Systems Inc. (United States)


Published in SPIE Proceedings Vol. 1002:
Intelligent Robots and Computer Vision VII
David P. Casasent, Editor(s)

© SPIE. Terms of Use
Back to Top