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Proceedings Paper

Implementation Of Image Preprocessing Functions Using CCD LSI Circuits
Author(s): S. D. Fouse; G. R. Nudd; P. A. Nygaard
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Paper Abstract

The computational burden of any image-processing system is on the preprocessing functions. These include such functions as two-dimensional convolution, edge extraction, texture-feature extraction, and nonlinear filtering (e.g., median filtering). This paper describes the fabrication of three CCD chips on which several image-preprocessing functions have been implemented with effective operation rates equivalent to 10,000 MOPS. The paper also briefly reviews the work done on the first two chips and then describes in more detail functions included on the third chip and the experimental results. The functions discussed include a 5 x 5 voltage-programmable convolution, a 26 x 26 convolution, a 7 x 7 mask-programmable convolution, a 5-element sort for median filtering, and a 3 x 3 Laplacian filter. These circuits have all been designed to operate at a 7-MHz pixel rate.

Paper Details

Date Published: 6 August 1980
PDF: 13 pages
Proc. SPIE 0225, Infrared Image Sensor Technology, (6 August 1980); doi: 10.1117/12.958712
Show Author Affiliations
S. D. Fouse, Hughes Research Laboratories (United States)
G. R. Nudd, Hughes Research Laboratories (United States)
P. A. Nygaard, Carlsbad Research Center (United States)


Published in SPIE Proceedings Vol. 0225:
Infrared Image Sensor Technology
Esther Krikorian, Editor(s)

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