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Proceedings Paper

An In Situ Interferometric Analysis Of Resist Development On Photomask Substrates
Author(s): A. E. Novembre; W. T. Tang; P. Hsieh
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Paper Abstract

An apparatus designed to monitor the development rate and thus control the feature size of electron beam exposed positive-acting resists on photomask substrates is presented. Development rate monitoring and development end-point identification is accomplished using real time optical interferometric techniques. This system is interfaced with an Applied Process Technology (APT)0 resist spray-spin development processor. The interferometric signal is collected and processed by an automated computer system, and is used to determine the required total development time necessary to obtain the correct critical dimensions on photomask substrates. Initial testing of the apparatus consisted of monitoring and controlling the development of electron beam exposed poly(butene-l-sulfone) (PBS) films on different reflectivity photomask substrates. For specific sets of processing conditions, calibration plots are generated by using the penultimate extrema of the interferometric development trace of an exposed center pad as a time reference point. Results have indicated that due to exposure proximity effects, it is necessary to generate separate calibration plots for a feature when it is isolated vs. when present in a periodic array. These calibration plots were tested for their validity using a series of developer concentrations (70/30 to 90/10 v/v % 5- methy1-2-hexanone/2-pentanone) and under varying relative humidity (12 to 40%) conditions. For previously defined geometry types, features in 1.25 to 4.0 μm range were within ± 0.05 μm of their coded sizes. These results represent a clear indication that stringent control PBS processing conditions and the need for iterative development can be eliminated, thereby providing a certain degree of automation in the photomask fabrication process.

Paper Details

Date Published: 19 July 1989
PDF: 9 pages
Proc. SPIE 1087, Integrated Circuit Metrology, Inspection, and Process Control III, (19 July 1989); doi: 10.1117/12.953119
Show Author Affiliations
A. E. Novembre, AT&T Bell Laboratories (United States)
W. T. Tang, Laserlith Corp. (United States)
P. Hsieh, Laserlith Corp. (United States)


Published in SPIE Proceedings Vol. 1087:
Integrated Circuit Metrology, Inspection, and Process Control III
Kevin M. Monahan, Editor(s)

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