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Proceedings Paper

A New Device Architecture Suitable For High-Resolution And High-Performance Image Sensors
Author(s): Jerry Hynecek
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Paper Abstract

A new device architecture was developed for building high-performance and high-resolution image sensors suitable for consumer TV camera applications. The sensor elements employed in this architecture are junction field-effect transistors that are organized into an array with their gates floating and capacitively coupled to common horizontal address lines. The photogenerated signal is sampled one line at a time, processed to remove the element-to-element nonuniformities, and stored in a buffer for subsequent readout. The described concept, which includes an intrinsic exposure control, is demonstrated on a test image sensor that has an 8-mm sensing area diagonal and 580(H) x 488(V) picture sensing elements. The key performance parameters achieved in this design, in addition to a high packing density of sensing elements with a unique hexagonal shape, include high signal uniformity, low dark current, good light sensitivity, high blooming overload protection, and no image smear.

Paper Details

Date Published: 23 May 1989
PDF: 10 pages
Proc. SPIE 1071, Optical Sensors and Electronic Photography, (23 May 1989); doi: 10.1117/12.952514
Show Author Affiliations
Jerry Hynecek, Manager Image Sensor Development (United States)

Published in SPIE Proceedings Vol. 1071:
Optical Sensors and Electronic Photography
Morley M. Blouke; Donald Pophal, Editor(s)

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