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Proceedings Paper

An Ultra-Fast SBNR Divider
Author(s): Michael Andrews; Wayne Lenius
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Paper Abstract

A novel redundant number system divider chip is described. This design incorporates an SRT division algorithm with internal signed digit representations in the division recurrence loop. The design promises to be faster and requires less physical space.

Paper Details

Date Published: 17 May 1989
PDF: 11 pages
Proc. SPIE 1058, High Speed Computing II, (17 May 1989); doi: 10.1117/12.951686
Show Author Affiliations
Michael Andrews
Wayne Lenius


Published in SPIE Proceedings Vol. 1058:
High Speed Computing II
Keith Bromley, Editor(s)

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