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Proceedings Paper

Optical Implementations Of Lumped Threshold Logic
Author(s): S. C. Gustafson; J. A. Kirk; G. R. Little; R. P. Kenan; C. M. Verber
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Paper Abstract

Optically implemented threshold logic systems that are characterized by thresholding operations concentrated at one functional location are considered. The objective is to identify architectures and associated integrated optical and holographic techniques that might be used to design superior register-level computation modules. A complete design for a lumped threshold 2-bit multiplier is presented as an example, and methods for general lumped threshold module synthesis are discussed.

Paper Details

Date Published: 4 January 1986
PDF: 10 pages
Proc. SPIE 0564, Real-Time Signal Processing VIII, (4 January 1986); doi: 10.1117/12.949717
Show Author Affiliations
S. C. Gustafson, University of Dayton Research Institute (United States)
J. A. Kirk, University of Dayton Research Institute (United States)
G. R. Little, University of Dayton Research Institute (United States)
R. P. Kenan, Battelle Columbus Laboratories (United States)
C. M. Verber, Battelle Columbus Laboratories (United States)


Published in SPIE Proceedings Vol. 0564:
Real-Time Signal Processing VIII
Keith Bromley; William J. Miceli, Editor(s)

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