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Proceedings Paper

ISA - A New Parallel Architecture For Real-Time Robot Control And High-Speed Vision Systems
Author(s): Olivier Y. de Vel; Venu K. Murthy
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Paper Abstract

A new versatile programmable parallel VLSI architecture, called Instruction Systolic Arrays (ISA), is presented. The ISA retains all the advantages of conventional systolic arrays (such as regularity, modularity and parallelism at a fine level of granularity), but is also able to execute many different types of algorithms. The versatility of the ISA means that it can handle real-time variations in algorithmic calls and makes it suitable for use in adaptable real-time systems.

Paper Details

Date Published: 21 March 1989
PDF: 7 pages
Proc. SPIE 1004, Automated Inspection and High-Speed Vision Architectures II, (21 March 1989); doi: 10.1117/12.949008
Show Author Affiliations
Olivier Y. de Vel, University of Waikato (New Zealand)
Venu K. Murthy, University of Waikato (New Zealand)


Published in SPIE Proceedings Vol. 1004:
Automated Inspection and High-Speed Vision Architectures II
Michael J. W. Chen, Editor(s)

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