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Proceedings Paper

Arrays For Partitioned Matrix Algorithms: Tradeoffs Between Cell Storage And Cell Bandwidth
Author(s): Jaime H. Moreno; Tomas Lang
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Paper Abstract

A graph-based partitioning method for designing systolic arrays for matrix computations is extended to apply it to processing elements with a small local memory. The introduction of this memory produces a reduction in the cell communication bandwidth and facilitates the use of pipelining within cells. As a consequence, efficient arrays can be designed using the extended method combined with technological parameters that define the ratio between processor speed and communication bandwidth. The extended partitioning method also allows evaluating tradeoffs between linear and two-dimensional arrays. We illustrate the method using a cube-shaped canonical algorithm, which is communication and computation intensive, and triangularization by Givens' rotations.

Paper Details

Date Published: 16 December 1989
PDF: 14 pages
Proc. SPIE 0977, Real-Time Signal Processing XI, (16 December 1989); doi: 10.1117/12.948567
Show Author Affiliations
Jaime H. Moreno, University of California Los Angeles (United States)
Tomas Lang, University of California Los Angeles (United States)

Published in SPIE Proceedings Vol. 0977:
Real-Time Signal Processing XI
J. P. Letellier, Editor(s)

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