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Proceedings Paper

Glass Wafer Processing And Inspection For Qualification Of Reticles In A Fineline Wafer Stepper Production Facility
Author(s): R. T. Hilton; T. E. Zavecz; J. A. Reynolds
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Paper Abstract

The concept of VLSI chip fabrication in a step and repeat lithography based facility varies significantly from that of the conventional 1:1 aligner based process. Whereas a 1:1 mask contains over 100 possible chip sites covering a five inch wafer, a 5:1 stepper reticle may contain as few as one chip site per exposure with two to four being more typical. This small reticle array is the stepped across the wafer to fill all possible chip postitions on the wafer. If a printable defect exists on the reticle then the final dis yield will directly experience a loss of anywhere from 25% (four chips per reticle) to 100% (one chip per reticle) of the potential chips in all lots exposed with that reticle.

Paper Details

Date Published: 23 July 1985
PDF: 5 pages
Proc. SPIE 0538, Optical Microlithography IV, (23 July 1985); doi: 10.1117/12.947755
Show Author Affiliations
R. T. Hilton, AT&T Technology Systems (United States)
T. E. Zavecz, AT&T Technology Systems (United States)
J. A. Reynolds, Reynolds Consulting (United States)

Published in SPIE Proceedings Vol. 0538:
Optical Microlithography IV
Harry L. Stover, Editor(s)

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