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Proceedings Paper

A Direct Writing Electron Beam Lithography Based Process For The Realisation Of Optoelectronic Integrated Circuits
Author(s): W. A. Hughes; J. A. Barnard
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Paper Abstract

A 3 inch GaAs optoelectronic integrated circuit (OEIC) process has been developed for the fabrication of an integrated optical detector array Initial work has concentrated on a 16 element array plus amplifier operating in the 2-3 GHz frequency range. The detecting elements can be Schottky barrier photodiodes, photoconductive detectors, or optical MESFETs, whilst the amplification network is based on 1 µm gate length MESFETs with a 2 source-to-drain spacing. Direct writing electron beam lithography is employed for both pattern definition and automatic pattern registration, giving linewidth and alignment tolerances of better than 0.2 μ,m. The active regions of the FET are doped n-type using ion implantation of Si29.

Paper Details

Date Published: 29 January 1985
PDF: 8 pages
Proc. SPIE 0517, Integrated Optical Circuit Engineering I, (29 January 1985); doi: 10.1117/12.945135
Show Author Affiliations
W. A. Hughes, Hirst Research Centre (United Kingdom)
J. A. Barnard, Hirst Research Centre (United Kingdom)


Published in SPIE Proceedings Vol. 0517:
Integrated Optical Circuit Engineering I
Daniel B. Ostrowsky; Sriram Sriram, Editor(s)

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