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Proceedings Paper

Modulo (6 +- 5i) Inner Product Computer
Author(s): G E Marx; P R Beaudet; J C Bradley; E C Malarkey; J D Fogerty; D W Beuerle; B W Skelly
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Paper Abstract

A Residue Number System (RNS) modulo (6+5i) multiplier/accumulator computer utilizing factored look-up tables (LUTs) is presented. The inner product computer computes the inner product of two n dimensional complex integer vectors. The general features of the 200 MHz multiplier/accumulator is described. A discussion of the design of the inputs, the multiplier, the accumulator, the optical fiber decoder interconnections and the distributed clock is included. An architecture is given as an example. Finally, a fabricated modulo (6 + Si) multiplier (photo included) is described which demonstrates the validity of the concept.

Paper Details

Date Published: 12 April 1988
PDF: 7 pages
Proc. SPIE 0886, Optoelectronic Signal Processing for Phased-Array Antennas, (12 April 1988); doi: 10.1117/12.944189
Show Author Affiliations
G E Marx, Westinghouse Electric Corporation (United States)
P R Beaudet, Westinghouse Electric Corporation (United States)
J C Bradley, Westinghouse Electric Corporation (United States)
E C Malarkey, Westinghouse Electric Corporation (United States)
J D Fogerty, Westinghouse Electric Corporation (United States)
D W Beuerle, Westinghouse Electric Corporation (United States)
B W Skelly, Westinghouse Electric Corporation (United States)


Published in SPIE Proceedings Vol. 0886:
Optoelectronic Signal Processing for Phased-Array Antennas
Kul B. Bhasin; Brian M. Hendrickson, Editor(s)

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