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Proceedings Paper

Hardware Implementation Of An Artificial Neural Network
Author(s): Ross A McClain Jr.; Charles H Rogers; William J.B Oldham
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Paper Abstract

A hardware implementation of a lightly connected artificial neural network known as the Hogg-Huberman model (1) (2) is described. The hardware is built around NCR's Geometric Arithmetic Parallel Processor (GAPP) chip. A large perfor-mance gain is shown between this implementation and a simulation done in FORTRAN on a VAX 11/780. Even though the direct processor to processor communications are limited to nearest neighbors, models which require other connections can be implemented with this hardware.

Paper Details

Date Published: 3 May 1988
PDF: 4 pages
Proc. SPIE 0882, Neural Network Models for Optical Computing, (3 May 1988); doi: 10.1117/12.944095
Show Author Affiliations
Ross A McClain Jr., E-Systems Inc (United States)
Charles H Rogers, East Texas State University (United States)
William J.B Oldham, Texas Tech University (United States)

Published in SPIE Proceedings Vol. 0882:
Neural Network Models for Optical Computing
Ravindra A. Athale; Joel Davis, Editor(s)

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