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Proceedings Paper

Fault Tolerance Techniques For Systolic Arrays
Author(s): Franklin T. Luk; Eric K. Torng
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Paper Abstract

In this paper, we study three fault tolerance techniques: data redundancy, algorithm-based fault tolerance, and pair and spare. These techniques, each individually useful, produce excitingly high levels of protection at a relatively low cost when used in combination. We first discuss the techniques separately, extending triple data redundancy to band matrix multiplication while applying algorithm-based fault tolerance to dense matrix multiplication. We then combine double data redundancy and algorithm-based fault tolerance to produce a linear array that corrects transient errors at minimal costs. Finally, we show how the above techniques can be used to implement pair and spare at half the normal cost.

Paper Details

Date Published: 25 November 1987
PDF: 7 pages
Proc. SPIE 0827, Real-Time Signal Processing X, (25 November 1987); doi: 10.1117/12.942043
Show Author Affiliations
Franklin T. Luk, Cornell University (United States)
Eric K. Torng, Princeton University (United States)


Published in SPIE Proceedings Vol. 0827:
Real-Time Signal Processing X
J. P. Letellier, Editor(s)

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