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Proceedings Paper

A 50 to 400 Mbit/Sec Single Chip Fiber Optic Receiver Circuit
Author(s): Dennis L. Rogers; Albert X Widmer; Joseph Mosley
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Paper Abstract

A high speed fiber optic receiver is described which uses a single chip to perform all of the electronic functions. These functions include low noise preamplification, amplification to a logic compatible signal level, and automatic level restoration which maintains the correct receiver decision point over a large range of optical input power. The receiver has operated at bit rates from 50 to 400 Mbit/sec with sensitivities as high as -33 dbm.

Paper Details

Date Published: 10 May 1984
PDF: 5 pages
Proc. SPIE 0466, Optical Interfaces for Digital Circuits & Systems, (10 May 1984); doi: 10.1117/12.941566
Show Author Affiliations
Dennis L. Rogers, IBM Thomas J. Watson Research Center (United States)
Albert X Widmer, IBM Thomas J. Watson Research Center (United States)
Joseph Mosley, IBM General Technology Division (United States)


Published in SPIE Proceedings Vol. 0466:
Optical Interfaces for Digital Circuits & Systems
Raymond Milano, Editor(s)

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