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Proceedings Paper

Silicon Material Phenomena In VLSI Circuit Processing
Author(s): Howard R. Huff
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Paper Abstract

The VLSI era will require increased Active Electronic Gate (AEG) density and reduced IC leakage current. The fabrication of circuits to achieve these ends, however, is often accompanied by process-induced defects which degrade the desired circuit characteristics. This brief review will highlight the influence of several point, line and surface defects on the fabrication and electrical characteristics of devices/IC's. Several examples of bulk defect gettering and lithographic processes resulting in unique device/IC configurations to reduce these deleterious effects will then be described.

Paper Details

Date Published: 31 May 1984
PDF: 13 pages
Proc. SPIE 0463, Advanced Semiconductor Processing/Characterization of Electronic/Optical Materials, (31 May 1984); doi: 10.1117/12.941338
Show Author Affiliations
Howard R. Huff, Monsanto Electronic Materials Company (United States)

Published in SPIE Proceedings Vol. 0463:
Advanced Semiconductor Processing/Characterization of Electronic/Optical Materials
Carl M. Lampert; Devindra K. Sadana, Editor(s)

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