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Proceedings Paper

Measurement Considerations For Future High Speed Computer Packaging
Author(s): G. V. Kopcsay; G. Arjavalingam; A. Deutsch
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Paper Abstract

The decrease in the cycle times of computers has resulted from improvements in the performance of the active circuits and the passive structures on which these circuits are packaged. In this paper we first summarize the state of the art in high-performance computer packaging. Estimates of future requirements for package interconnection structures are then described along with a few measurement techniques that can be used to characterize their electrical properties. High-speed measurements on an experimental thin-film transmission line structure obtained using three of these techniques are presented to illustrate the different measurement considerations.

Paper Details

Date Published: 2 February 1988
PDF: 12 pages
Proc. SPIE 0795, Characterization of Very High Speed Semiconductor Devices and Integrated Circuits, (2 February 1988); doi: 10.1117/12.940935
Show Author Affiliations
G. V. Kopcsay, IBM Thomas J. Watson Research Center (United States)
G. Arjavalingam, IBM Thomas J. Watson Research Center (United States)
A. Deutsch, IBM Thomas J. Watson Research Center (United States)


Published in SPIE Proceedings Vol. 0795:
Characterization of Very High Speed Semiconductor Devices and Integrated Circuits
Ravinder K. Jain, Editor(s)

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