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Proceedings Paper

Direct-Write Electron Beam Lithography For Integrated Circuits: Submicron Image Reversal Process Of Novolac-Diazo Resist And Its Stability Towards Composite Metallization In Bipolar Gate Arrays For Vlsi
Author(s): Rao M. Nagarajan; Steven D. Rask; Brian R. Lee
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Paper Abstract

Considerable effort has recently been directed at the development of direct write electron beam lithography techniques for the fabrication of custom gate arrays with the submicron design rules. Advantages include quick turn around time for prototype circuits as well as the elimination of the mask fabrication cost. In this paper, a lithographic technique for the patterning of submicron dimensions using an image reversal process and its process stability for the layered structures of TiW/A1-2% Cu interconnect metallization in a double metal technology for the prototyping of bipolar gate arrays, are described. This image reversal process for AZ1470 photoresist differs from that of Oldham and Heike (reference number 6) in that an extra edge exposure of electron dose is given to the resist to create electron density difference between exposed and unexposed areas and also to achieve vertical sidewall of the resist profile. The various processing parameters are optimized to obtain 90° sidewall of the resist profile with 0.25pm gate metal features, with high contrast and high aspect ratio. Resolution between 1.0pm and 2.0pm (1.0pm lines and 1.5pm spaces) on TiW/A1-2% Cu electrode metallization patterns were obtained in lithographic evaluation of this image reversal process for the fabrication of bipolar gate arrays. Such resulting patterns have the following characteristics: no notching or necking of the pattern, reduced proximity effect with no feature biasing needed, higher etch resistance of novolac resist, higher speed of electron beam exposure, and compatibility of the resist and equipment for standard processing. Isolated gate features as small as 0.25pm and 1.0pm lines and 1.5pm spaces on metallization patterns in prototyping for bipolar gate arrays have been realized by this lithographic process using direct write electron beam technique.

Paper Details

Date Published: 30 June 1987
PDF: 6 pages
Proc. SPIE 0773, Electron-Beam, X-Ray, and Ion-Beam Lithographies VI, (30 June 1987); doi: 10.1117/12.940356
Show Author Affiliations
Rao M. Nagarajan, UNISYS Corporation (United States)
Steven D. Rask, UNISYS Corporation (United States)
Brian R. Lee, UNISYS Corporation (United States)


Published in SPIE Proceedings Vol. 0773:
Electron-Beam, X-Ray, and Ion-Beam Lithographies VI
Phillip D. Blais, Editor(s)

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