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Proceedings Paper

An Innovative Compiler For Programming And Designing Real-Time Signal Processors
Author(s): Orni Petruschka; H. C. Torng
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Paper Abstract

Real time signal processing tasks impose stringent requirements on computing systems. One approach to satisfying these demands is to employ intelligently interconnected multiple arithmetic units, such as multipliers, adders, logic units and others, to implement concurrent computations. Two problems emerge: 1) Programming: Programs with wide instruction words have to be developed to exercise the multiple arithmetic units fully and efficiently to meet the real-time processing loads; 2) Design: With a given set of real-time signal processing tasks, design procedures are needed to specify multiple arithmetic units and their interconnection schemes for the processor. This paper presents a compiler which provides a solution to the programming and design problems. The compiler that has been developed translates blocks of RISC-like instructions into programs of wide microinstructions; each of these microinstructions initiates many concurrently executable operations. In so doing, we seek to achieve the maximum utilization of execution resources and to complete processing tasks in minimum time. The compiler is based on an innovative "Dispatch Stack" concept, and has been applied to program Floating Point System(FPS) processors; the resulting program for computing inner-product and other signal processing tasks are as good as those obtained by laborious hand-compilation. We will then show that the compiler developed for programming can be used advantageously to design real-time signal processing systems with multiple arithmetic units.

Paper Details

Date Published: 4 April 1986
PDF: 8 pages
Proc. SPIE 0696, Advanced Algorithms and Architectures for Signal Processing I, (4 April 1986); doi: 10.1117/12.936900
Show Author Affiliations
Orni Petruschka, Cornell University (United States)
H. C. Torng, Cornell University (United States)


Published in SPIE Proceedings Vol. 0696:
Advanced Algorithms and Architectures for Signal Processing I
Jeffrey M. Speiser, Editor(s)

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