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Proceedings Paper

A Two Layer Photoresist Process In A Production Environment
Author(s): K. Bartlett; G. Hillis; M. Chen; R. Trutna; M. Watts
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Paper Abstract

A manufacturable, high resolution photoresist process is described. This process was developed to increase production margins on the 1.0 μm geometries used in the Hewlett Packard NMOS III process: This was accomplished through a modification of the portable conformal mask (PCM) technique,2 which drastically reduced substrate effects on GCA. wafer stepper performance by the introduction of a bleachable dye in the bottom photoresist layer.

Paper Details

Date Published: 7 November 1983
PDF: 9 pages
Proc. SPIE 0394, Optical Microlithography II: Technology for the 1980s, (7 November 1983); doi: 10.1117/12.935121
Show Author Affiliations
K. Bartlett, Hewlett Packard (United States)
G. Hillis, Hewlett Packard (United States)
M. Chen, Hewlett Packard (United States)
R. Trutna, Hewlett Packard (United States)
M. Watts, Hewlett Packard Laboratories (United States)

Published in SPIE Proceedings Vol. 0394:
Optical Microlithography II: Technology for the 1980s
Harry L. Stover, Editor(s)

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