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Proceedings Paper

S-1 Multiprocessor System
Author(s): J. M. Broughton; P. M. Farmwald; T. M. McWilliams
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Paper Abstract

This paper describes the S-1 multiprocessor system. It is composed of 16 supercomputer class uniprocessors with local caches, an extremely large, medium latency shared memory, and a low latency synchronization bus for passing short messages. The system is applicable to a wide variety of applications, including large-scale physical simulation, real-time command and control, and program development in a time-sharing environment. The hardware organization, its implications, and software supporting the efficient utilization of the multiprocessor are discussed.

Paper Details

Date Published: 28 December 1982
PDF: 6 pages
Proc. SPIE 0341, Real-Time Signal Processing V, (28 December 1982); doi: 10.1117/12.933729
Show Author Affiliations
J. M. Broughton, Lawrence Livermore National Laboratory (United States)
P. M. Farmwald, Lawrence Livermore National Laboratory (United States)
T. M. McWilliams, Lawrence Livermore National Laboratory (United States)

Published in SPIE Proceedings Vol. 0341:
Real-Time Signal Processing V
Joel Trimble, Editor(s)

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