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Proceedings Paper

Novel Multibit Convolver/Correlator Chip Design Based On Systolic Array Principles
Author(s): J. G. McWhirter; J. V. McCanny; K. W. Wood
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Paper Abstract

A novel multi-bit convolver/correlator circuit is described. The circuit has been designed to operate as a systolic array of simple one bit processor and memory cells and, as a result it can operate at relatively high data rates by making efficient use of silicon area. Since the design is extremely regular in nature and requires very little control it should be easy to implement in VLSI technology. The size of circuit which can be fabri-cated and the data rate which can be achieved will of course depend on the specific tech-nology which is chosen.

Paper Details

Date Published: 28 December 1982
PDF: 10 pages
Proc. SPIE 0341, Real-Time Signal Processing V, (28 December 1982); doi: 10.1117/12.933697
Show Author Affiliations
J. G. McWhirter, Royal Signals and Radar Establishment (England)
J. V. McCanny, Royal Signals and Radar Establishment (England)
K. W. Wood, Prestwick Circuits Ltd. (Scotland)

Published in SPIE Proceedings Vol. 0341:
Real-Time Signal Processing V
Joel Trimble, Editor(s)

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