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Proceedings Paper

Digital Pipelined Hardware Median Filter Design For Real-Time Image Processing
Author(s): Dennis J. Delman
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Paper Abstract

A hardware median filter is described which is designed to filter imagery at a real-time rate of 10X106 pixels/second. The data is windowed with line buffers, and propagates through n pipe lined stages where n is the number of bits in a pixel. The algorithm described is a form of the radix method of Atamanl modified to reduce the decisionmaking at each stage. Each stage is nearly identical thus making the filter very structured and modular. The filter can be implemented with available logic components and would be useful as a preprocessor in a pattern recognition system.

Paper Details

Date Published: 30 July 1982
PDF: 5 pages
Proc. SPIE 0298, Real-Time Signal Processing IV, (30 July 1982); doi: 10.1117/12.932528
Show Author Affiliations
Dennis J. Delman, Harris Corporation (United States)


Published in SPIE Proceedings Vol. 0298:
Real-Time Signal Processing IV
Tien F. Tao, Editor(s)

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