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Proceedings Paper

Problem Adaptation To Systolic Arrays
Author(s): R. W. Priester; H. J. Whitehouse; K. Bromley; J. B. Clary
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Paper Abstract

The systolic array architecture is known to make highly efficient use of hardware in evaluating certain matrix products provided that the matrices are banded strongly. However, this high efficiency can be degraded significantly if the matrices to be processed do not possess the narrow bandwidth feature, but assume a more general structure. This paper introduces and evaluates two techniques which in some instances can enhance systolic array efficiency. The approach effectively reduces to adapting problem structure so that it more naturally fits the systolic array architecture. Potential benefits from this approach are quantified and presented in graphical form.

Paper Details

Date Published: 30 July 1982
PDF: 7 pages
Proc. SPIE 0298, Real-Time Signal Processing IV, (30 July 1982); doi: 10.1117/12.932509
Show Author Affiliations
R. W. Priester, Research Triangle Institute (United States)
H. J. Whitehouse, Naval Ocean Systems Center (United States)
K. Bromley, Naval Ocean Systems Center (United States)
J. B. Clary, Research Triangle Institute (United States)


Published in SPIE Proceedings Vol. 0298:
Real-Time Signal Processing IV
Tien F. Tao, Editor(s)

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