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Proceedings Paper

Effects of constant voltage stressing on HfTaOx/SiGe gate stack
Author(s): S. Mallik; C. Mahata; M. K. Hota; C. K. Sarkar; C. K. Maiti
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Paper Abstract

Ultrathin HfTaOx gate dielectric has been deposited on Si0.81Ge0.19 by RF co-sputtering of HfO2 and Ta2O5 targets. X-ray photoelectron spectroscopic (XPS) analyses indicate an interfacial layer containing GeOx, Hf silicate, SiOx (layer of Hf- Si-Ge-O) formation during deposition of HfTaOx. No evidence of Ta-silicate or Ta incorporation was found at the interface. X-ray diffraction (GIXRD) measurements show that as-deposited HfTaOx films are amorphous; however, the crystallization temperature of HfTaOx film is found to increase significantly after annealing beyond 500 °C (for 5 min) along with the incorporation of Ta (with 18% Ta). It has been found that HfTaOx gate dielectric on Si0.81Ge0.19 exhibit excellent electrical properties with low interface state density (~6.0×1011 cm-2eV-1) and hysteresis voltage (<70 mV). Charge trapping/detrapping behavior of the gate stacks has been studied under constant voltage stressing and the degradation mechanism of the dielectrics has been studied in detail.

Paper Details

Date Published: 15 October 2012
PDF: 8 pages
Proc. SPIE 8549, 16th International Workshop on Physics of Semiconductor Devices, 854925 (15 October 2012); doi: 10.1117/12.926999
Show Author Affiliations
S. Mallik, Indian Institute of Technology Kharagpur (India)
C. Mahata, Indian Institute of Technology Kharagpur (India)
M. K. Hota, Indian Institute of Technology Kharagpur (India)
C. K. Sarkar, Jadavpur Univ. (India)
C. K. Maiti, Indian Institute of Technology Kharagpur (India)


Published in SPIE Proceedings Vol. 8549:
16th International Workshop on Physics of Semiconductor Devices
Monica Katiyar; B. Mazhari; Y N Mohapatra, Editor(s)

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