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Proceedings Paper

Device oriented statistical modeling method for process variability in 45nm analog CMOS technology
Author(s): Ajayan K. R.; Navakanta Bhat
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Paper Abstract

With the rapid scaling down of the semiconductor process technology, the process variation aware circuit design has become essential today. Several statistical models have been proposed to deal with the process variation. We propose an accurate BSIM model for handling variability in 45nm CMOS technology. The MOSFET is designed to meet the specification of low standby power technology of International Technology Roadmap for Semiconductors (ITRS).The process parameters variation of annealing temperature, oxide thickness, halo dose and title angle of halo implant are considered for the model development. One parameter variation at a time is considered for developing the model. The model validation is done by performance matching with device simulation results and reported error is less than 10%.

Paper Details

Date Published: 15 October 2012
PDF: 6 pages
Proc. SPIE 8549, 16th International Workshop on Physics of Semiconductor Devices, 854909 (15 October 2012); doi: 10.1117/12.926853
Show Author Affiliations
Ajayan K. R., Indian Institute of Science (India)
Navakanta Bhat, Indian Institute of Science (India)

Published in SPIE Proceedings Vol. 8549:
16th International Workshop on Physics of Semiconductor Devices
Monica Katiyar; B. Mazhari; Y N Mohapatra, Editor(s)

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